A novel OFDM Blind Equalizer: Analysis and Implementation
David Gonzalez Fitch (Virginia Tech, USA); Ashwin E Amanna (Virginia Tech, USA); Tamal Bose (Virginia Tech, USA); Joseph D. Gaeddert (Virginia Tech, USA)
Link adaptation is important to guarantee robust and reliable wireless communications without wasting valuable radio resources. This technique has become more feasible with the recent appearance of Software Defined Radios (SDRs), which allow easy reconfiguration of their parameters via software. As the environment changes over time, the transmitter needs to be able to effectively estimate its performance under different radio input parameters to be able to find a close to optimal solution. In most wireless communications, an equalizer is implemented at the receiver to estimate the channel impulse response. This estimate can be fed back to the transmitter via a feedback channel, which can in turn help generate a sub-optimal transmission solution for the current situation. In this paper a new blind channel estimator specific for Orthogonal Frequency-Division Multiplexing (OFDM), based on previous work, is presented. With the use of OFDM, it can be assumed that the frequency fading at each subcarrier is approximately flat. In addition, under the assumption that the channel is quasi-stationary, the Bit Error Rate (BER) at each subcarrier can be estimated by using the well-known BER formulas for an Additive White Gaussian Noise (AWGN) channel. However, the effect of imperfect channel estimation must also be taken into account. Finally, real over-the-air results are presented.
Novel Detector Implementations Achieving 3G LTE Downlink and Uplink Requirements
Tuomo Hänninen (Centre for Wireless Communications University of Oulu, Finland); Janne Janhunen (University of Oulu, Finland); Markku Juntti (University of Oulu, Finland)
In this paper, we summarize our recent state-of-the- art programmable and reconfigurable detector implementations achieving 3G LTE downlink and uplink requirements. The downlink transmission is based on the orthogonal frequency division multiplexing (OFDM), whereas the uplink transmis- sion is based on the single-carrier frequency-division multiple access (SC-FDMA). The downlink implementation is based on a programmable transport triggered architecture (TTA), which provides a flexible and energy efficient architecture template. In TTA implementation, the LTE throughput requirements up to 20 MHz bandwidth and 4x4 antenna system with 64-QAM, are achieved by using 1-6 programmable cores in parallel. Each core runs at 277 MHz clock frequency and consumes 55.5-64.0 mW depending on the detector configuration. The downlink detector is based on the selective spanning with fast enumeration (SSFE) algorithm. The uplink field-programmable gate array (FPGA) implementation is targeted for 4x4 antenna system and 64-QAM achieving a throughput requirement for 20 MHz bandwidth. Two different different architectures are implemented. The first one achieves the throughput requirement with a single processing block running at 231 MHz and the latter one with 4 blocks in parallel, each running at 247 MHz. The used FPGA board is Xilinx Virtex-6 and the implementation has been carried out using Xilinx AutoESL high level synthesis (HLS) tool. The implemented detector is based on the K-best algorithm.
Design of a Transport Triggered Architecture Processor for Flexible Iterative Turbo Decoder
Shahriar Shahabuddin (Centre for Wireless Communications, University of Oulu, Finland); Janne Janhunen (University of Oulu, Finland); Markku Juntti (University of Oulu, Finland)
In order to meet the requirement of high data rates for the next generation telecommunication systems, the efficient implementation of receiver algorithms is essential. On the other hand, the rapid development of technology motivates the investigation of programmable implementations. This paper summarizes the design of a programmable turbo decoder as an application-specific instruction-set processor (ASIP) using Transport Triggered Architecture (TTA). The processor architecture is designed in such manner that it can be programmed to support other receiver algorithms, for example decoding based on the Viterbi algorithm. Different suboptimal maximum a posteriori(MAP)algorithms are used and compared for the soft-input soft-output (SISO) component decoders in a single TTA processor. The max-log-MAP outperforms the other suboptimal algorithms in terms of latency. The design enables the user to change the suboptimal algorithms according to the bit error rate (BER) performance requirement. Unlike many other programmable turbo decoder implementations, Quadratic Polynomial Permutation(QPP)Interleaver is used in this work for contention free memory access and to make the processor 3GPP LTE compliant. Several optimization techniques to enable real time processing on programmable platforms have been introduced also in this paper. Using our method, with a single iteration 31.32 Mbps throughput is achieved for the max-log-MAP algorithm for a clock frequency of 200 MHz.
Impact of MAC Protocols on Efficiency of Wireless Distributed Computing Applications
Stephen Dudley (L-3 Communications, USA); Abid Ullah (Virginia Tech, USA)
This paper considers the impact of Media Access Control protocol in the efficiency of a Wireless Distributed Computing application. Four protocols are considered (CDMA, FDMA, TDMA and CSMA). These protocols are assumed to be applied to two different network topologies, Hub/spoke for densely populated networks using omni-directional antennas and Round Robin (or Ring) for sparsely populated networks using directional antennas. Using these assumptions, five different scheduling strategies are selected for each topology and the efficiency of the Wireless Distributed Computing application is calculated as the percentage of time that distributed nodes can spend processing data as opposed to waiting for data to be delivered. It was found that a useful statistic to help compare the results is the processing time per megabyte of data delivered. The results indicate that pipelining of data transmission and data processing activities can allow 100% efficiencies to be achieved but that this is unlikely for systems with omni-directional antennas where RF contention is acute. This suggests that rate long distance systems with high data rates (e.g. systems originally designed for ISR work) might be good candidates for Wireless Distributed Computing applications.
Modified Partial Update EDS Algorithms for Adaptive Filtering
Bei Xie (Virginia Tech, USA); Tamal Bose (Virginia Tech, USA)
Partial update (PU) Euclidean direction search (EDS) algorithms have been developed to reduce the computational complexity of the full-update EDS. In this paper, the PU EDS is modified to achieve better performance. The performance is analyzed for a time-invariant system and for a time-varying system. Theoretical steady state mean and MSE results of the modified PU EDS are derived for both time-invariant system and time-varying system. The performance of the PU EDS is also compared with the PU recursive least squares (RLS) algorithm and the PU conjugate gradient (CG). Computer simulations are presented to support the theoretical analyses. The modified PU EDS can achieve similar performance to the full update EDS while reducing the computational complexity significantly.
Implementation of a precoding algorithm combined with adaptive beamforming for downlink MU-MIMO SDR system
Hyunwook Yang (Hanyang University, Korea); Kyunghoon Kim (Hanyang University, Korea); SeungWon Choi (Hanyang University, Korea); Sungsoo Ahn (Myongji College, Korea)
In this paper, we propose a new precoding method which includes an adaptive beamforming as well as channel inversion in Multiple User-Multiple Input Multiple Output (MU-MIMO) SDR system. We demonstrate that the Multiple Access Interference (MAI) is mitigated by the precoding technique can further be reduced by appending a beamforming procedure in MU-MIMO system in which various users share a given channel resource. Beamforming is an array antenna technology that provides a beam pattern which provides a maximum gain along the direction of desired signal and minimum gain along the direction of each interference. Therefore, the precoding combined with a proper beamforming algorithm can drastically enhance the performance of MU-MIMO system. Through and a system implementation as well as computer simulation, we verify that the proposed precoding method provides much improved performance compared to conventional precoding methods in MU-MIMO system. Our experimental system consists of WiBro (Wireless Broadband) base-station which has 2 MIMO elements each of which contains 3-array antennas and 2 mobile terminals each of which adopts a single antenna. A channel inversion matrix has been adopted as a MU-MIMO encoding matrix while an ordinary Lagrange formula is chosen as adaptive beamforming algorithm for computing the optimal beam pattern. And smart antenna API standardized by OMG is used for implementing precoding and beamforming algorithm in order to realize SDR system. Through computer simulations, we demonstrate that the proposed precoding method outperforms conventional precoding method at least by 4dB in terms of SNR. From experimental tests, we also verify the feasibility of the proposed precoding method for realizing a practical WiBro base-station for utilizing channel resources more efficiently. And we verify that implementation of SDR system can be realized by using the smart antenna API.
Frequency Domain Eye Diagram for OFDM
Ertugrul Guvenkaya (USF, USA); Huseyin Arslan (University of South Florida, USA)
Information symbols have been represented in various dimensions of electro space such as time, frequency and code which makes testing and measurement even more critical tasks in wireless communication systems. However, representation of channel impairments on signals has been mostly done in time rather than the dimension in which the symbols are defined. Therefore, visualization and measurement of impairments in different domains should be considered for better understanding of system and its performance in under distortion. For example, eye diagrams have been heavily used to observe the impairments in single carrier systems such as NADC and GSM in which the symbols are defined in time domain. However in orthogonal frequency-division multiplexing (OFDM) systems, symbols are represented in frequency domain. In this paper, we focused on frequency domain representation of OFDM signals as well as time varying impairments, which hampers orthogonality of overlapping subcarriers by introducing inter-carrier interference (ICI). While the inter-symbol interference caused by time domain impairments e.g., time spread and timing jitter for Nyquist pulse shaped single carrier signals is observed by time domain eye diagram, an eye diagram in frequency domain for OFDM can be used as an effective tool to achieve the detection and visualization of the impairments caused by time variant channels like Doppler spread and carrier frequency offset. In order to obtain frequency domain eye diagram, interpolation between output samples of regular discrete Fourier transform (DFT) is performed by zero padding into received time domain symbols which converges the analysis operation to discrete-time Fourier transform (DTFT). Centered inverse DFT (IDFT) and DFT are adopted at transmitter and receiver, in order to avoid complex interpolation. As the greater DFT size is achieved at the receiver, eye diagram for both in phase and quadrature part of complex baseband symbols are constructed via partitioning the interpolated frequency domain symbols into two carrier spacing-sized chunks. Finally, each chunk is plotted at the top of each other to construct the eye diagrams. Also, same subcarriers of several OFDM symbols are overlapped to avoid the effect of frequency selectivity on wideband signals. Proposed methods provide information whether carrier frequency offset and frequency spreading occurs or not by considering shift of eye crossings to the lower or upper frequencies and reduced eye openings in the analysis, respectively. Carrier frequency offset estimation without utilizing known preambles is also possible by detecting the high density frequency points in the eye pattern. Simulations are performed along with the real channel measurements under various conditions such as time variance with rotating fans and multipath channel in anechoic chamber and carrier frequency offset; to illustrate the effectiveness of the proposed method. The frequency domain eye diagrams can be employed for the testing of wireless systems, to conduct interference measurement and for educational purposes.
Adaptive Roll off Factor Utilization for FMT based FBMC Burst Structures
Zekeriyya Ankarali (University of South Florida, USA); Alphan Şahin (University of South Florida, USA); Huseyin Arslan (University of South Florida, USA)
In this paper, we propose an adaptive roll-off factor utilization for filtered multitone (FMT) based filter bank multicarrier (FBMC) burst structures. Conventionally, a single prototype filter which has the same roll-off factor is employed for whole FBMC symbols. Thus, the conventional approach neglects the advantage of using filter adaptation against doubly dispersive channels. Unlike the conventional approach, in this study, different filters in terms of roll-off factors are utilized within the burst and the roll-off factors are adaptively changed by paying regard to the time and frequency dispersions of the channels. Also, by allowing the controlled interference between subcarriers, an average frequency spacing is applied to the burst structure. Therefore, immunity against multipath delay spread or Doppler spread is gained. Additionally, new degree of freedoms, i.e., average frequency spacing, adaptation speed, and filter truncation are investigated for the FMT-based burst structure.
Low-complexity algorithm for inversion of special matrices in SDR systems
David Guevorkian (Tampere University of Technology, Finland); Kim Rounioja (Renesas Mobile, Finland); Jarmo Takala (Tampere University of Technology, Finland)
Inversion of circulant Hermitian matrices is one of the most computationally complicated algorithms used in communication, signal processing, and other systems. In particular, it may be used in tap solvers of advanced HSDPA systems. In this paper, a novel fast method for finding the inverse of a circulant Hermitian matrix is proposed. The proposed method is based on using Discrete Cosine (DCT-1) and Discrete Sine (DST-1) transforms of Type 1. It reduces the number of operations approximately by a factor of four compared to conventional Fast Fourier Transform (FFT) based method.
Waveform Reconstruction from Ontological Description
Leszek Lechowicz (Northeastern University, USA)
Software Defined Radio (SDR) is a radio in which all or majority of the functionality of the physical layer is implemented in software. The developments in high- performance, low-power DSP processors and FPGAs made the SDR the leading technology in communications systems nowadays. One of the biggest benefits of SDR is the relative ease in which the functionality can be changed. One of the areas where such flexibility could potentially be used is the interoperability of the communications systems, which as the events of 9/11 showed, was one of the weak elements of the overall emergency response to the crisis. Cognitive Radio (CR) - a paradigm that combines SDR technology with a cognitive agent - allows radios to change their operational behaviors in order to achieve a variety of goals, e.g. performance optimization, power saving, opportunistic use of resources, etc. Cognitive Radios are expected to play the leading role in the communications systems interoperability.
In this work a method for ontology-based waveform reconfigurability is proposed. In this method all interoperating cognitive radios share the same base SDR ontology. Sharing base ontology allows the radios to understand the concepts in a uniform way thus enabling transfer of more complex concepts from one node to another. In the process of reconfiguration, nodes can receive descriptions of waveforms expressed in Web Ontology Language (OWL) and Rules and then automatically configure their processing according to the specification. Such specifications would contain both structural descriptions of software components and finite state machines (FSM) necessary to compose the waveform from simpler software modules. The waveform configuration process encompasses generating state machines, building a model of the waveform by generating OWL individuals and relationships between them using the inference engine and the specified rules. The constructed model is then used to instantiate state machines and other software components and to connect them in the prescribed way. The result of the overall process is such that a cognitive radio is able to learn and construct a waveform it did not know before.
A proof-of-concept system has been built confirming the feasibility of the proposed method. In the process of this system's evaluation three different waveforms (BPSK31, QPSK31 and RTTY) have been described in OWL and Rules and these descriptions were successfully transferred from one node to another and then used by the receiving node to construct fully functional software modules implementing the waveforms.
An Example of Wireless Distributed Computing Network on CORNET
Xuetao Chen (Virginia Tech, USA); Tamal Bose (Virginia Tech, USA); Joseph D. Gaeddert (Virginia Tech, USA); Jeffrey Reed (Virginia Tech, USA); Harris I Volos (University of Arizona, USA)
Wireless distributed computing networks (WDCNs) can group multiple wireless devices to fulfill high performance computing task. It has several unique problem compared with wireless communication networks and traditional distributed computing networks, among which considerations of the wireless channel on the delay performance of distributed computing is the most important one. For WDCN nodes, radios support the distributed computing components (CPU) but also compete with them for power supply. Due to the uncertainty of wireless channel, WDCN needs to design a dedicated resource allocation method in order to leverage the impacts of the wireless channel and minimize the delay performance.
In this paper, we will introduce a design and implementation of an example WDCN developed on the Virginia Tech COgnitive Radio NEtwork Testbed (VT-CORNET). The paper first gives a theoretical analysis of delay performance for proposed resource allocation methods for WDCNs. Then software dedicated to WDC based on SDR technologies is designed and implemented to demo the concepts and compare the experimented data with the theoretical results. The results of experiments show the channel heterogeneity must be considered for WDCNs in order to reduce both the mean and variance of the execution time. The combination of SDR and multi-process programming makes it easy, based on this demo, to implement all kinds of WDCNs with different computing applications in the future.
Distributed Localized Interference Avoidance for Dynamic Frequency Hopping ad hoc Networks
Sebastian Koslowski (Karlsruhe Institute of Technology (KIT), Germany); Jens P. Elsner (Karlsruhe Institute of Technology (KIT), Germany); Friedrich K. Jondral (Karlsruhe Institute of Technology, Germany); Stefan Couturier (Fraunhofer-Institut FKIE, Germany); Cedric Keip (Thales Defence & Security Systems, Germany); Olaf Bettinger (Thales Defence & Security Systems, Germany)
We present a cognitive solution for FH-CDMA ad hoc networks. Building on a cluster-based split phase multi-channel MAC protocol, a mechanism for local interference avoidance through distributed hopset adaptation is proposed. Its goal is to identify and substitute channels not suitable for reliable communication. Substitution rules replace channels by locally unused hopsets. This way interference is mitigated while maintaining orthogonality between nodes' hopsets. We compare and evaluate different substitution strategies. This research work was carried out in the frame of the CORASMA - EDA Project B-0781-IAP4-GC.
Small form factor Cognitive Radio, implemented via FPGA partial reconfiguration, replacing a wired video transmission system
Raúl Torrego (IK4-IKERLAN Research Alliance, Spain); Iñaki Val (IKERLAN Technological Research Center, Spain); Eñaut Muxika (University of Mondragon, Spain)
Nowadays there is a trend towards replacing wired communication systems by wireless ones. When this action has to be performed into industrial environments, special care has to be taken, considering the harsh conditions present in this type of environments. The use of Software Defined Radios or Cognitive Radios fulfils perfectly with both, the wireless characteristic and the securing of the reliable communications this kind of environments requires. Therefore, this paper presents a small form factor cognitive communication system that substitutes a wired video streaming system. The cognitive system senses the availability of the transmission channel and it is able to change its IF (intermediate frequency) working frequency if necessary. It has been implemented on an FPGA, taking advantage of partial reconfiguration to carry out the frequency change, whereas the signal processing algorithms that make up the system have been designed using System Generator: Xilinx's rapid prototyping tool
Synergies Between Cognitive Radio and Positioning Systems (Presentation Only)
James Neel (Cognitive Radio Technologies, LLC, USA)
This paper will review ongoing research being performed by Cognitive Radio Technologies, LLC (CRT) and Government and Industry Research and Development Systems, Inc (GIRD) into synergistic techniques from cognitive radio and (non-GPS) positioning systems to improve both communications and positioning performance. The paper will discuss possible synergies, technical issues posed by the synergies, algorithms and anticipated market applications.
The development and deployment of technologically advanced communications capabilities provided to the war-fighter needs to become increasingly more rapid and less costly across a multitude of military system and product solutions to ensure that the information flow on the battlefield keeps pace with the demands of the mission. The Software Communications Architecture (SCA) developed by the U.S. Department of Defense (DoD) provides a solid foundation for software high level reusability through standardization of a layered architectural framework providing separation between the underlying software infra-structure referred to as the Operating Environment (OE) with Waveform Applications through defined Applications Programmer Interfaces (APIs). Component Based Design (CBD) is the underlying technology of the SCA which also drives software reusability at the more granular software component level. The Wireless Innovation Forum SCA Committee has developed a Coordination Model for International SCA Standards providing the basis for harmonization among a suite of existing and emerging SCA based SDR specifications. The Coordination Model is intended to help leverage the significant investment of Governments, Industry and Academia via substantive economies of scale derived from a larger market base for SCA technologies, thereby providing benefit to the full spectrum of stakeholders. This presentation will explore another potential value proposition of the Coordination Model to further reduce software development cost and facilitate time-to-market savings through the application of Software Product Line and other related techniques. A Software Product Line (SPL) is defined as a set of software-intensive systems that share a common, managed set of features satisfying the specific needs of a particular market segment or mission and that are developed from a common set of core assets in a prescribed way. A harmonized set of SCA standards and specifications can facilitate the use of an SPL software development paradigm, broadly leveraging a highly reusable code base in an effective manner across multiple domains, systems, products and individual releases. In addition, SPL techniques when integrated with automated testing methodologies have the potential to significantly reduce the scale and time of rigorous testing cycles that ensure military SDR product compliance and reliability. Conclusions and recommendations will be provided from this analysis and evaluation.
Implementation of SDR-based WCDMA Air Protocol Analyzer with an Emphasis on Equalizer for Software Modem
This paper presents an implementation of SDR-based Air Protocol Analyzer(APA). APA is a measurement system providing real-time analysis of wireless signals between User Equipment (UE) and Node-B. Since the implemented system proposed in this paper consists of Digital Signal Processors (DSPs) and Field Programmable Gate Arrays (FPGAs), it can be reconfigured through a software exchange for supporting various communication standards. The waveform of Wideband Code Division Multiple Access (WCDMA) has been selected for verification of the proposed system, which simultaneously supports up to 48 users in the frequency band of 3 Frequency Allocations (FA) in real-time. Note that the proposed system exhaustively supports all the channels defined in 3GPP (Release 7) which includes High Speed Packet Access channels as well as normal data channels. After the decoding procedures in Layer1, Layer2, and Layer3, the proposed APA system provides final outputs of audio and video signals through speaker and monitor, respectively. It can also store the wireless signals and decode storage data on off-line basis. In WCDMA system, receiving procedures except some of the Physical (PHY) layer parts, i.e., transport layer part, L2, and L3 parts, are simply reverse of the transmitting procedures like in most other systems as well. So, it could be said in some sense that the entire performance is largely dependent upon PHY layer algorithms. Based on that principle, we designed the software modem using 2 different ways, one with rake method and the other equalization method, to compare the performance to each other. Through extensive experimental tests, we have found that the equalization method outperforms the rake method in most practical signal environments. Especially, in adverse signal environments such as low Signal-to-Noise Ratio (SNR), fast mobility, high-rate modulation like 16QAM, equalizer far outperforms rake receiver. Our experimental tests have shown that throughput provided by equalizer-based modem is nearly 2-10 times higher than that provided by rake-based modem. The main reason being so is that, when SNR is very poor because of too low spreading factor and/or too high other-cell interference like in some cases of HSPA signal environments and/or in cell edge area, rake-based modem performs very badly while equalizer-based modem can still retrieve the transmit data as long as channel estimation remains acceptable, which provides a reasonable estimation of equalizer tap coefficients. The only disadvantage with the equalizer-based software modem is relatively heavy computational complexity which is mainly due to the inversion of channel matrix, which poses as a hindrance in hardware implementation of the APA system. We propose a novel algorithm for simplifying the computational procedure of the equalizer-based software modem and compare the performance with rake-based modem as a function of computational complexity. The key idea of reducing the computational complexity is to exploit the fact that the channel matrix, which is a key part in estimating the equalizer tap coefficients, is sparse and quasi-toeplitz. Proposed algorithm reduced the computational complexity from 3rd order to 2nd order of the tap length. As our system has adopted 60 taps, we have verified in various experimental signal environments that the proposed algorithm of reduced complexity enables real-time processing of the software modem of APA system for WCDMA standards. In this paper, we have shown that real-time processing of WCDMA APA system can be supported by the proposed equalizer-based software modem. In the implemented system, all the signal processing required in L1, L2, and L3 including antennas and Radio Frequency(RF) parts as well are exhaustively realized to support all the channels defined in 3GPP Release 7 together with HSDPA and HSUPA.
Enhanced FPGA GNU Radio Flow
Richard Stroop (Virginia Tech, USA)
An enhanced GNU Radio flow is presented that seamlessly augments the GNU Radio software-only model with FPGAs, yet preserves the GNU Radio dynamics by providing full-custom radio hardware/software structures in seconds. By delegating portions of a GNU Radio flow graph to networked FPGAs, a larger class of software-defined radios can be implemented. Assembly of the signal processing structures within the FPGAs is accomplished using an enhanced flow where modules are customized, placed, and routed in a fraction of the time required by the vendor tools. With rapid FPGA assembly, a GNU Radio designer retains the ability to perform "what-if" experiments, which in turn greatly enhances productivity.
Picoflexor: Advanced Architecture for High Performance Software Definable Radio (Presentation Only)
Clark Pope (DRS Signal Solutions, USA)
This paper introduces a novel software-definable radio (SDR) architecture, called Picoflexor™. The Picoflexor is the marriage of a high performance V/UHF tuner with a motherboard that accepts one of several possible processing elements from OMAP based DSP (for low power) to Zynq based FPGAs (for maximum performance) and one of several interface expansion modules from USB2.0 (for low power) to gigabit Ethernet (for high throughput). The architecture is specifically designed to accommodate the reality that the digital processing elements and interfaces of modern SDR platforms advance much faster than corresponding RF technology. By making the processing element and interface a plug in, the platform, which is designed for extreme environmentals and low SWAP, allows the systems engineer to right size the processing capacity and data bandwidth to specific applications and the same platform can be retained through several generations of DSP/FPGA and interface technologies.
This paper also provides a brief history of SDR technologies and an in depth description and analysis of the Picoflexor architecture including a critical analysis of direct conversion receivers versus the Picoflexor superhetorodyne architecture. Detailed information on the operating system, control software, GNU radio port, etc. is included. The Picoflexor development toolset, called Velocity-IDE, is explained. Specific applications of the platform are described and discussed such as porting and running GNU Radio based waveforms, high speed spectral search, and geolocation of signals. Ideas for future work and overall conclusions of the architecture are presented.
Low-complexity SDR Implementation of IEEE 802.15.4 (ZigBee) Baseband Transceiver on Application Specific Processor
Amanullah Ghazi (University of Oulu, Finland); Jani Boutellier (University of Oulu, Finland); Jari Hannuksela (University of Oulu, Finland); Olli Silvén (University of Oulu, Finland); Janne Janhunen (University of Oulu, Finland)
This paper describes a low-cost SDR implementation and performance evaluation of an IEEE 802.15.4 (Zigbee) baseband transceiver realized with a programmable Transport Trigger Architecture (TTA) Application Specific Processor (ASP). The SDR implementation has advantages over current System-on-Chip (SOC) implementations in terms of programmability and flexibility. The transceiver is designed for the 2.4 GHz ISM band and is based on Zero Intermediate Frequency (Zero-IF) receivers. Non-coherent demodulation is used based on Minimum Shift Keying (MSK) interpretation of Offset Quadrature Phase Shift Keying (O-QPSK) modulation with Half-Sine Pulse Shaping. The Asynchronous Zero Crossing Detector (AZCD) algorithm is used for demodulation, which has lower computational complexity compared to coherent detection algorithms. With a single core TTA implementation and throughput of 250 kbps, Symbol Error Rate (SER) and Packet Error Rate (PER) meet the IEEE 802.15.4 standard requirements. The designed TTA processor occupies only a modest amount of logic from the Xilinx Virtex 4 FPGA board that is used as an implementation platform.
Bridging the Gap between Specifications and Compliance Tests (Presentation Only)
James Ezick (Reservoir Labs, USA); Jonathan Springer (Reservoir Labs, USA)
If a specification is written, but software written to it cannot be tested for compliance, does it make an impact? In this paper we take the position that testability should be fundamental in the development of a software specification and that the process of writing a specification should go hand-in-hand with the generation of compliance tests for that specification. Drawing from experience developing R-Check SCA, a static software test tool that assists software developers in writing SCA-compliant code, we illustrate how new features of the tool bridge the gap between prose specifications and working static compliance tests. Using a system of natural-language templates, we demonstrate how it is possible to expose the capabilities of static testing though an interface that approximates the sort of declarative statements commonly found in specification documents. Using this interface as a bridge, it is possible to construct a system of readable statements that also have precise formal meanings and for which it is possible to automatically derive working tests. In essence, a single document serves as both the written documentation and the testing blueprint. Tests representable under these extensions are capable of capturing both atomic syntactic properties and conditions on sequences of statements. Statements in the language are also capable of specifying properties spanning both multiple files and enforcing consistency across multiple file types. Drawing on well-understood techniques in analysis, the resulting tests can balance precision with scalability in precisely describable ways. Combined with methods for automatic model-driven code generation, it is possible to construct complex code that remains simple to check once business logic has been added. For current versions of the SCA, these features can be used to capture and maintain certain existing tests in an easily readable way.
R-Check SCA is a compliance testing tool being used by, and developed in partnership with, the Joint Tactical Radio System (JTRS) Test & Evaluation Lab (JTEL). R-Check SCA uses static source code analysis to check requirements contained in the SCA 2.2.2 specification. R-Check SCA uses a compiler-grade static analysis engine combined with off-the-shelf tools and data formats to test SCA-specific requirements that cut across C/C++ source code, CORBA IDL, and SCA XML descriptor files and generate concise, reproducible incident reports. JTEL has reported that using R-Check SCA has reduced the time to test certain SCA requirements by up to 90%.
SIMD Programming in GNU Radio: Maintainable and User-Friendly Algorithm Optimization with VOLK
Tom Rondeau (Rondeau Research, LLC, USA); Nicholas McCarty (University of Maryland, USA)
For almost 20 years, general purpose processors (GPP) have come equipped with collections of extra-wide registers, vector processing units, and instruction set extensions designed primarily for multimedia applications. Use of these instructions, known collectively as single-instruction multiple-data (SIMD) instructions, can augment on-chip processing power well beyond using standard arithmetic and logic units alone. Improved software radio performance using SIMD operations is well-documented and as old as the technology itself, but several factors contribute to persistent underutilization.
Software radio places a premium on hardware portability, but manufacturers have used proprietary advances in SIMD technology to differentiate GPP products among different producers and between different generations of the same product line. Intel, AMD, PowerPC, and ARM each have developed their own incompatible SIMD extensions. The march of progress has brought wider registers (64, 128, and now 256-bits) and expanded basic functionality (horizontal operations and specialty operations such as the dot product). Software radio is more attractive if the GPP acts as a simple commodity, but SIMD extensions make the GPP less like a commodity. SIMD is essentially the feature set around which transparency to the software designer breaks down.
To write vectorized code requires carefully reworking established algorithms, and even after more than a decade of work, compilers take only minimal advantage of SIMD resources. Individual efforts to leverage SIMD operations using only a compiler and a manufacturer's API frequently result in Byzantine solutions, not amenable to easy interpretation, extension or upkeep. Various attempts to standardize SIMD usage, some of them quite good, have emerged to make SIMD portability more practicable. Nonetheless, the SIMD development resists the imposition of a standard. Technology develops too quickly, and a subset of developers needs the latest at the earliest opportunity. SIMD development is a costly investment, and tying the returns on that investment to an external project creates risk. To use SIMD technology effectively often requires assumptions on the circumstances of code execution including data size and alignment. SIMD development and specific application remain inextricably linked such that no true standard can yet satisfy the needs of a generic applications developer.
Recently, GNU Radio introduced the Vector-Optimized Library of Kernels (VOLK), a general-purpose abstraction layer to make using and programming SIMD extensions efficient and easy. VOLK can function as another candidate for standardization around SIMD technology, but it exists to serve as handmaiden to software radio applications in general and GNU Radio in particular. VOLK is unique in that it strives both to utilize automated compiler SIMD optimization while leaving the door open to, and taking maximum advantage of, new and preexisting hand-optimized solutions.
With this paper, we provide a detailed description of the VOLK programming model. We discuss strategies used to affect cross-platform portability as well as the VOLK build environment and runtime behavior. We cover the protocol for adding new kernels to VOLK as well as new hardware technologies, and we document how best to utilize VOLK code in GNU Radio applications. We contrast VOLK with SIMD abstraction within former versions of the GNU Radio filter application, and we show how GNU Radio has employed low-level adaptations to best utilize VOLK kernels. Finally, we measure the impact of VOLK on performance for specific algorithms important to software radio and to the overall structure of GNU Radio.
RF Domain Channel Emulation Techniques with SAW filters
Murat Karabacak (University of South Florida, USA); Alphan Şahin (University of South Florida, USA); Huseyin Arslan (University of South Florida, USA)
Conventional channel emulators apply pre-determined channel models to baseband digital signals. However, processing on the baseband signal and utilizing down and up conversion stages result in an expensive emulator which also introduce additional distortions at these stages. In this paper, low cost and small size channel emulator implementation techniques are introduced using surface acoustic wave (SAW) devices. In the first method, a pre-determined channel is introduced on the RF signal with using a number of SAW filters. In the second approach, an exponential decaying channel with controllable decaying factor is generated using a single SAW filter. As a result, simple, small, and cheap channel emulator for a specific channel model at a fixed carrier frequency is provided with SAW technology.
Implementation of an ASIP based SDR platform for MIMO OFDM transceivers
Torsten Kempf (RWTH Aachen University Germany, Germany); Daniel Guenther (RWTH Aachen University Germany, Germany); Uwe Deidersen (RWTH Aachen University, Germany); Alberto Antonio Yarmuch Munoz (RWTH Aachen University, Germany); Marc Adrat (Fraunhofer FKIE / KOM, Germany); Gerd H. Ascheid (RWTH Aachen University, Germany); Markus Antweiler (Fraunhofer FKIE, Germany)
Supporting several wireless communication standards with a single hardware device, demands for a flexible hardware platform that allows implementation of these standards in software while still meeting the tight real-time requirements. Furthermore, these SDR platforms have to achieve a viable trade-off between the contradicting requirements of flexibility on one side and area, power as well as energy efficiency on the other side. One promising approach is to utilize programmable Application Specific Instruction Set Processors (ASIPs) for the computational intensive functions of the baseband transceiver within modern wireless communication standards. Thanks to their programmability these provide sufficient flexibility while being optimized for the targeted application hence achieving performance comparable to dedicated hardware accelerators. In the course of this paper we demonstrate such an ASIP design based on the LISA 2.0 language and Synopsys' Processor Designer. The primary target of the ASIP is the computational complex MIMO OFDM preprocessing and equalization, e.g. found in the IEEE 802.11n standard. Furthermore, an integrated Virtual Platform prototype has been designed to provide a system-level of the complete hardware platform achieving real-time performance for the IEEE 802.11n standard. The Virtual Platform allows for detailed system-level performance analysis and area estimation simulator at an early design stage and prior to time-intensive RTL design.
An Embedded Platform Based Public Safety Cognitive Radio
Almohanad Fayez (Virginia Tech, USA); Qinqin Chen (Virginia Polytechnic Institute and State University, USA); Alexander Young (Virginia Polytechnic Institute and State University, USA); Nicholas Kaminski (Center for Wireless Telecommunications, USA); Hedieh Alavi (Virginia Polytechnic Institute and State University, USA); Charles Bostian (Virginia Tech, USA)
The paper discusses the Center for Wireless Telecommunication (CWT) Public Safety Cognitive Radio (PSCR), an all-band all-mode cognitive radio for public safety applications, and how it was redesigned to run on an embedded platform. The original PSCR was designed to allow public safety personnel to move into an area, find existing radios, configure itself to communicate with those radios, in addition the PSCR is able to run a gateway mode where it can bridge two incompatible radios. The PSCR was designed to run on a laptop connected to a programmable radio front-end, however a laptop based implementation makes the transition to a handheld device challenging in terms of power and computational requirements. The embedded PSCR addresses these concerns by using an embedded GPP/DSP processor based platform, a separate user-interface platform, and a programmable radio front-end for over the air communication. The GPP/DSP based processor realizes the radio functionality while the user-interface platform is a touch screen GUI interface for radio operators and the programmable radio front-end allows the users transmit and receive RF signals over the air. The paper will discuss the selected hardware architecture for the system, low level system implementation, and will discuss some of the issues faced while transitioning a laptop-based system to an embedded platform.
Recently, a number highly reconfigurable RF front-ends (and RFICs) have been introduced targeting software-defined radios (SDR) applications. However, these RF front-ends are generally controlled using rule-based algorithms. This paper introduces cognitive engine to control highly reconfigurable RF front-ends. The cognitive engine is used to adjust the antenna loading, pre-selector filter characteristics, LNA bias, IF frequency and sampling frequency of the radio with respect to state of in radio environment and the characteristics of the waveform, in real time. The algorithms in the engine are designed to adjust these parameters with the objective of maximizing the signal quality.
A highly-reconfigurable SDR platform was designed and used to demonstrate the performance of the cognitive engine. The platform contains tunable front-end filters, a reconfigurable RFIC and a Virtex-5 FPGA. Few sensors were also included in both the analog and digital section of the platform to stimulate the actions of the cognitive engine. The results of the experiments show that better bit-error-rate and throughput performances can be obtained by adopting cognitive control of RF front-ends.
Strategies for the calculation of location specific power limits for secondary devices operating on TV white spaces
Erika Almeida (Nokia Institute of Technology, Brazil); Fabiano de Sousa Chaves (Nokia Institute of Technology, Brazil); Robson Domingos Vieira (Nokia Institute of Technology, Brazil); Renato Iida (Nokia Institute of Technology, Brazil)
The use of TV white spaces as an alternative to overcome spectrum scarcity is a huge opportunity for new telecommunication systems and services. While being attractive due to desirable propagation characteristics, this part of the spectrum imposes a major difficulty from design and regulatory perspectives: how to optimize spectrum usage and to ensure the protection of primary users, TV systems for example, at the same time. This paper discusses strategies to be adopted by geolocation database operators to calculate adaptive maximum permitted power levels for secondary devices, known as white space devices WSD, according to permissible interference levels into the digital terrestrial television, DTT, primary system, based on the methodology proposed by the European Conference of Postal and Telecommunications, CEPT, on ECC Report 159.
WCDMA and OFDMA Coexistence with device-to-device communication overlaying cellular networks
Rafhael Amorim (Nokia Institute of Technology, Brazil); Robson Domingos Vieira (Nokia Institute of Technology, Brazil); Paulo Carvalho (Universidade de Brasilia, Brazil)
The usage of Device-to-device (D2D) networks overlaid on a Cellular network is a promising technique to increase the multimedia rich services capability of wireless networks based in a resource sharing environment. It offers the possibility of reusing the same wireless resource in multiple devices at the same time, improving the overall efficiency of the network. The D2D link on this context must be used for short-distance communication, using low-power transmission, releasing the cellular resource on the cellular network central node. In this case, the assurance of the quality in both links depends on the interference level being below harmful levels. This concern involves mitigating the interference among the different devices in all directions, but since the D2D link will be established on resources firstly designated to cellular communication, it can be seen as a secondary layer of communication and cannot takes priority over the cellular links (primary layer). The network resource allocation policies must be developed in order to keep the interference in low levels while maximize the reuse probability. This paper proposes a new allocation scheme considering the coexistence between WCDMA and OFDMA in different layers. The proposed algorithm performs a relocation of the primary users on the OFDMA spectrum driven by the spread spectrum (WCDMA) characteristics of the secondary user aiming at improving the reuse possibility, mitigating the interference between the two layers and regarding the quality assurance for the cellular users.
Merging ant colony optimization based clustering and an imperialist competitive algorithm for spectrum management of a cognitive mobile ad hoc network
Next generation tactical military network will be based on mobile ad hoc networks (MANET). These networks require efficient spatial channel reuse in order to provide high spectral efficiency and this requires as well a stable network structure as an efficient channel assignment optimization method. In this paper ant colony optimization (ACO) and imperialist competitive algorithm (ICA) are merged in the cognitive manager for the combined clustering and channel assignment problem in a clustered based MANET. Ant colony optimization is used to choose the cluster head in an as advantageous way as possible. The used multi-objective function is defined to maximize the stability and scalability, minimize the number of clusters, and minimizing interference power in between clusters. The imperialist competitive algorithm is applied for solving the channel assignment problem. In this case the multi-objective function minimizes interference and maximizes the spectral efficiency.
Space Telecommunications Radio System (STRS) Cognitive Radio
Louis Handler (NASA Glenn Research Center, USA); Janette Briones (NASA Glenn Research Center, USA)
Radios today are evolving from awareness toward cognition. A software defined radio (SDR) provides the most capability for integrating autonomic decision making ability and allows the incremental evolution toward a cognitive radio. This cognitive radio technology will impact NASA space communications in areas such as spectrum utilization, interoperability, network operations, and radio resource management over a wide range of operating conditions.
NASA's cognitive radio will build upon the infrastructure being developed by Space Telecommunication Radio System (STRS) SDR technology. This paper explores the feasibility of inserting cognitive capabilities in the NASA STRS architecture and the interfaces between the cognitive engine and the STRS radio. The STRS architecture defines methods that can inform the cognitive engine about the radio environment so that the cognitive engine can learn autonomously from experience, and take appropriate actions to adapt the radio operating characteristics and optimize performance.
GD SDR Automatic Gain Control Testing and Characterization
Jennifer Nappier (NASA Glenn Research Center, USA); Janette Briones (NASA Glenn Research Center, USA)
The General Dynamics (GD) S-Band software defined radio (SDR) in the Space Communications and Navigation (SCAN) Testbed on the International Space Station (ISS) will provide experimenters an opportunity to develop and demonstrate experimental waveforms in space. The GD SDR platform and initial waveform were characterized on the ground before launch and the data will be compared to the data that will be collected during on-orbit operations. A desired function of the SDR is to estimate the received signal to noise ratio (SNR), which would enable experimenters to better determine on-orbit link conditions. The GD SDR does not have an SNR estimator, but it does have an analog and a digital automatic gain control (AGC). The AGCs can be used to estimate the SDR input power which can be converted into a SNR. Tests were conducted to characterize the AGC response to changes in SDR input power and temperature. This purpose of this paper is to describe the tests that were conducted, discuss the results showing how the AGCs relate to the SDR input power, and provide recommendations for AGC testing and characterization.
STRS Radio Service Software for NASA's SCaN Testbed
Dale Mortensen, P. E. (Vantage Partners, LLC, USA); Daniel Bishop (NASA GRC – Vantage Partners, LLC, USA); David Chelmins (NASA Glenn Research Center,USA)
NASA's Space Communication and Navigation(SCaN) Testbed was launched to the International Space Station in 2012. The objective is to promote new software defined radio technologies and associated software application reuse, enabled by this first flight of NASA's Space Telecommunications Radio System(STRS) architecture standard. Pre-launch testing with the testbed's software defined radios was performed as part of system integration. Radio services for the JPL SDR were developed during system integration to allow the waveform application to operate properly in the space environment, especially considering thermal effects. These services include receiver gain control, frequency offset, IQ modulator balance, and transmit level control. Development, integration, and environmental testing of the radio services will be described. The added software allows the waveform application to operate properly in the space environment, and can be reused by future experimenters testing different waveform applications. Integrating such services with the platform provided STRS operating environment will attract more users, and these services are candidates for interface standardization via STRS.
Ying Chen (University of South Australia, Australia); André Pollok (University of South Australia, Australia); David Haley (University of South Australia, Australia); Linda M. Davis (University of South Australia, Australia)
Rapidly evolving digital processing architectures are a key technology enabler for software defined radio (SDR). The flexibility of SDR is dependent upon a high speed front end that can provide large dynamic range and noise resilience in transferring from the analog to digital domain. The analog to digital converter (ADC) is a key component within the front end, and recent architectures have been proposed that make use of parallel ADCs to improve signal-to-noise ratio (SNR) or increase dynamic range.
Motivated by the SNR gains offered by multi-antenna receive diversity schemes, in this paper we show how similar techniques can be applied to the use of parallel ADC architectures. We provide a generalized model for the parallel ADC front end architecture, and show how it can represent existing techniques from the literature. The architecture is then used to develop new methods for low complexity ADC output combining. We propose a novel ADC combining scheme that is able to simultaneously improve SNR and dynamic range by reducing the impact of both quantization noise and saturation.
Making a company open-source friendly - lessons learned
Alexander Chemeris (Fairwaves LLC, Russia); Ebrahim Bushehri (Lime Microsystems, United Kingdom); Dale Wilson (Lime Microsystems, USA)
Software Defined Radio developers can benefit from access to RF transceivers which cover a broad range of frequencies and support a variety of protocols and waveforms. Such products are available from a few sources but access is often limited to top tier companies.
We will present our experience with making Lime Microsystems LMS6002D transceiver open-source friendly. We're working on how to make information about a product available to open-source developers and small companies without hindering sales to big customers, how to build community around the product and encourage source code and knowledge exchange between developers.
This effort has started in Feb 2012 and by the time of the conference we should have something to tell about lessons learned along the way.
Front End Architecture Design of Software Defined Radio Interoperable BTS between GSM and IS-95
Hari Hara Sudhan Subramanian (Anna University, India)
Software Defined Radio aims at using the same hardware for different applications by the change in software parameters. The reconfigurable part in a Software Defined Radio is the Digital Front-end. The modifiable parameters for different standards and technologies include bandwidth, Sampling Frequency, down converted IF, up converted IF and filter cut-off frequencies. The major goal for an ideal Software Defined Radio is to place the ADC as close to the antenna as possible. This can be achieved by Band-pass Sampling. The main objective of this paper involves the design of RF front end of a Software Defined Base Transceiver Station (BTS) which can be configured to support different technologies (here GSM/IS-95) depending on the software modifications. The RF front end is dealt for both the transmitter and receiver with appropriate models and the simulation results.
Software-Programmable Digital pre-Distortion on New Generation FPGAs
Baris Ozgul (Xilinx, Inc., Ireland); Jan Langer (Xilinx, Ireland); Juanjo Noguera (Xilinx, Inc., Ireland); Kees Vissers (Xilinx, USA)
In third and fourth generation (3G/4G) wireless systems and beyond, application of techniques such as non- constant envelope signaling, MIMO processing, and carrier aggregation plays a key role in meeting the target requirements for spectral efficiency, bit-error rate (BER), cell capacity and throughput [1],[2]. However, application of such techniques also results in many practical challenges in the air interface, which require the use of more sophisticated and flexible digital radio front-end (DFE) architectures in the wireless base-station. For example, one of the major issues in practice is the high peak-to-average power ratio (PAPR) of non-constant envelope signals [3]. Due to high PAPR and power amplifier (PA) non-linearity, the transmitted signals get distorted in magnitude and phase. The distortion typically results in a growth in the out-of-band (OOB) power of the signal, causing adjacent channel interference, and increases the BER.
Digital Pre-Distortion (DPD) is an advanced signal processing technique which mitigates the signal distortion mentioned above by inverting the non-linearity effects of the PA [3]. A generic DPD system consists of a pre-distorter that compensates for the nonlinearity effects prior to the input of the PA and an estimator on the feedback path from the output of the PA, to update the pre-distorter parameters to reflect the possible changes in the operation characteristics. Based on the type of modulation, power amplifier technology, and transmission bandwidth, effective DPD solution can differ. Hence, it is worthwhile to provide a flexible architecture for DFEs that facilitates the implementation and integration of new DPD parameter estimation algorithms.
Modern Field Programmable Gate Arrays (FPGAs) are a promising target platform for the implementation of a flexible architecture for efficient DPD solutions. However, the key barrier for the widespread adoption of FPGAs in signal processing algorithms was the traditional hardware-centric design-flow and tools. That is, the traditional use of FPGAs requires significant hardware design experience. Recently, new generation FPGAs that integrate programmable logic fabric with industry-standard embedded processors have become available [4]. These leading-edge platforms enable the partitioning of functionality among hardware and software components to increase the overall system performance. Furthermore, High-level Synthesis (HLS) tools have become available as design tools for FPGAs, that increase the design productivity and reduce the development time, while producing very competitive Quality of Results (QoR)[5].
This paper describes the implementation of a software-programmable framework for DPD targeting leading- edge FPGAs [4]. In addition to software programmability, another key contribution of our framework is the flexible partitioning of the functionality among hardware and software components, depending on the complexity of the DPD parameter estimation algorithm in use. We have applied ARM NEON instructions to optimize the software implementation and used AutoESL HLS tool as the design tool for the programmable logic.
We present a comprehensive study reporting the overall system performance when exploring the partitioning of functionality among hardware and software components. For low-complexity DPD parameter estimation algorithms, we show that it is sufficient to use a software-only solution after carrying out the aforementioned optimizations in the software implementation. For higher-complexity algorithms, our flexible framework allows the hardware acceleration of the time-consuming blocks in the programmable logic, where we use AutoESL HLS tool to generate the necessary hardware accelerators.
Integrated Communications Modeling: A Systemic Approach
Vincent J Kovarik, Jr (Prismtech, USA)
The past decade has seen an explosive growth in the use of modeling languages and tools. Although the set of tools are rich and diverse, the tendency remains for each engineering discipline to work in a solitary fashion with little integration, collaboration and knowledge exchange across disciplines. This often leads to inefficiencies and miscommunications between the various enigneering disciplines resulting architecture and design flaws.
This paper describes an integrated modeling project that is being applied to the communication system modeling domain with the objective of capturing and representing a cross-functional view of a communications systems archtiecture. The aspects include user scenarios and use cases, the systems engineering functional block architecture view, software architecture and a logical integration of hardware and software components into a bounded and well-defined module. The use and integration of industry standard modeling languages such as Systems Modeling Language (SysML) and the Unified Modeling Language (UML) together with domain specific tools that provide the ability to develop functional waveform models using both graphical and mathematical approaches are presented.
Intelligent SDR Infrastructures
Vincent J Kovarik, Jr (Prismtech, USA)
The research in the application of ontology-based approaches for cognitive radio systems has yielded promising indications of the potential to develop intelligent software radio systems. A substantial portion of the work has focused on the area of dynamic spectrum sharing and communications data link representation. However, ontology-based approaches have their foundations in limitations in certain areas, such as representation of events, actions and other dynamic concepts. This paper explores an approach to modeling objects, relations and actions as first-class foundational entities of a semantic programming language system. Key tenets that distinguish this approach is the notion that relationships and events are unique representational elements within the system. Unlike a traditional programming language, this allows direct manipulation of a relationship as an object within the system. Therefore, it is possible to simply query whether a particular relationship exists within the system by querying the existence of instances of the a particular relationship class. Similarly, a query can be made as to whether or not a a specific action as occurred. This approach to providing a rich underlying representation coupled with programmatic facilities leads to a the potential for a radio system that can not only reason over a set of objects but also actions and events that affect and alter the state of objects within the radio and the environment.
An Approach For Designing and Implementing BER Testbed
Dingqing Lu (Agilent Technologies Inc, USA), Ben Niu (Agilent Technologies, Inc.), Yahia Tachwali (Agilent Technologies, Inc.)
System designers always have some new ideas and designs proved by mathematical models and software program. However, these proposed designs might not work in the real world. Testbed is a way to fill this gap and present the opportunity to see the real problem and ensure that the design works. In this paper, an approach to design and implement bit error rate (BER) Testbed is proposed. As knew, BER is most important performance measurement for communication systems. BER Tester is for testing BER performances of communication systems. A core software package (CSP) will be used to design and implement all basic parts in the Testbed including a signal generator to support different signals, a channel emulator to emulate test environments, such as channel multipath fading, interferences and a receiver to support multi-system structures with timing/freq sync and phase error correction capability. Examples show the approach works well.
Prototyping SCA Transceiver APIs using a generic reasoner API
Mieczyslaw Kokar (Northeastern University, USA); Jakub Moskal (VIStology, Inc., USA); Durga Suresh (Northeastern University, USA)
API's are developed for different protocol layers, each with a specific purpose and particular hardware and software needs. Within the realm of the SDR there are many different APIs that are associated with transmitters, receivers, specific purposes of military operations and general research. These APIs are then implemented within a common SCA architecture, leading to a great advantage of interoperability among various radios and being platform independent. The standard practice of developing an API for an SDR is by first describing it in UML. While UML tools provide some methods for syntactically constraining the development of a specification of a system, they don't support the capability of verifying or enforcing the semantic constraints. Consequently, the semantic interpretation of the constraints imposed by an API is done by humans. This paper discusses the potential uses of languages with formal semantics (e.g., OWL) in the development of the SDR API's. In particular, it investigates the use of the concepts from the cognitive radio ontology (CRO) to express a Trasceiver API and then using a reasoner to analyze the specification, e.g., checking its logical consistency, querying the specifications of the API's . This paper proposes that instead of using each individual API, the CRO will be used to specify and implement the API. The user will thus not have to use multiple API's but one CRO
Porting…It's more than just Software
Ken Dingman (Harris Corp, USA)
The goal of the SCA was to improve interoperability between SDR's by defining a standard operating environment to host applications. This in turn would minimize the cost of porting applications between different platforms. To some extent this goal has been achieved as the SCA has become the basis the SDR architectures around the world. However, to truly minimize the cost of application development, reuse of code is just one aspect of a much larger picture. Currently, Harris supports over 10 waveform applications all of which run on multiple radios covering Manpack, Handheld, Type 1, Suite B and International platforms. In addition significant portions of the SCA Operating Environment are common across the different platforms. To support this level of reuse and commonality Harris has focused its development practices to minimize the cost of development on multiple radios. This presentation will explore the varied approaches Harris has taken to maximize operating environment and waveform application reuse. Among the topics to be discussed include: reuse of SW as well as other work products such requirements and test procedures, alignment of its organizational structure to promote reuse and development practices that have been implemented. Additionally, project results that show the effectiveness of these strategies will also be presented.
SCA SDR Product Line Engineering
Toby McClean (PrismTech, Canada)
We consider Software Communication Architecture (SCA) based Software Defined Radios (SDR) to be the devices, services, and core framework elements in the radio platform. In contrast to the waveforms/applications that run on the SCA SDR. Tools to specify the requirements, design and implementation of SCA SDRs have existed for over a decade. These tools have proven to increase their users productivity when developing a specific SDR, however, to the best of our knowledge they do not address the problem of specifying a SDR product line. An SCA SDR product line is a set of SDRs that share a common baseline with each member of the product line having additional capabilities and/or a different configuration. In this presentation we present an approach and the supporting tools to specifying a SDR product line that factors out the common elements of the SDR and explicitly specifying the variable aspects of the SDR. Specific SDRs are then expressed by binding the variable aspects to specific 'values'. The variable aspects come in two forms: optional elements and parameterized values for attributes. From a model containing variation points a feature model is generated that enumerates all of the variation points. With the generated feature model a user can create specific configurations of the feature model where they include/exclude optional elements and provide values for the parameterized attributes. From a specific configuration we are able to generate the SCA domain profile (XML descriptors) that take into account the specific build values. The approach and tools offer several benefits to a SCA SDR developer. One benefit is a productivity improvement that results from not having to manage independent models for each member of the software product line. Any changes that affect the entire product line are made once and propagated to each member of the product line. A second benefit is a shorter time-to-market when introducing a new member to the product line. The base model has already been defined and the new member is likely to be a new configuration of the base model. Finally, the identification and explicit management of variable aspects of the SCA SDR offers greater opportunity for reuse of devices, services and core-framework elements in the SCA SDR.
Using Model Driven Development to Implement SCA v4.0 Compliant DSP and FPGA Based Applications
Andrew Foster (PrismTech Limited, United Kingdom)
The recently adopted SCA v4.0 standard was specified in the form of a Platform Independent Model (PIM) and a number of Platform Specific Models (PSMs). This has the advantage that the standard can support implementations based on different platform technologies, whether these are already specified or will emerge in the future . The PIM/PSM representation of the standard aligns with a Model Driven Architecture (MDA) approach to application development. A new CORBA PSM was also specified with the adoption of SCA 4.0 and defined an updated profile for General Purpose Processors (GPPs) called the SCA Full CORBA Profile. Importantly the standard also finally recognized that Digital Signal Processors (DSPs) and Field Programmable Gate Arrays (FPGAs) can also support a CORBA PSM and standardized two additional profiles, specifically the SCA Lightweight CORBA Profile targeted at DSPs and the Ultra-Lightweight CORBA Profile targeted at FPGAs. This presentation will show how a Model Driven Development (MDD) approach targeting the new SCA 4.0 CORBA PSM and spanning the complete GPP-DSP-FPGA signal processing chain can have significant benefits in terms of waveform portability and time to market for new applications and SDRs.
Accelerated GSM Baseband Process for Reconfigurable Software Defined Radio
Srinivas Gaddam (Rockwell Collins India, India)
Area optimization is one of the important issues in Field Programmable Gate Arrays (FPGA), since smaller systems allow multiple components to accommodate on a single chip. However, when enough space is available on chip, it would be good to have speed optimized version of same system as well. This paper presents novel approach of utilizing the area optimized version of module when sufficient space is not available and speed optimized version when enough space is available through dynamic reconfiguration of FPGA.
In this paper we considered designing digital base band modules of software defined radio (SDR) library specific to GSM communication standard. This library contains two different versions of configuration bit-streams for each hardware module stored in compact flash memory. These versions are characterized one with area optimized and more execution time, another with speed optimized and more device utilization. The suitable version can be downloaded from flash memory at the time of module based partial reconfiguration of FPGAs. All digital base band modules of the standard have been simulated to verify the functionality with supporting simulation tool ModelSim-6.2d, synthesized with Xilinx 10.1i (ISE) and successfully implemented on Xilinx Virtex-4(XC4VFX12). A comparison table of device utilization and execution time for individual integrated versions has been given.
DVB-T2 Rotated Constellation Demapping on a GPU
Stefan Grönroos (Åbo Akademi University, Finland); Kristian Nybom (Åbo Akademi University, Finland); Jerker Björkqvist (Åbo Akademi University, Finland)
The DVB-T2 standard for digital terrestrial broadcasting supports the use of QAM (quadrature amplitude modulation) constellations where the constellation points are rotated in the I-Q plane. This combined with a cyclic delay of the Q component provides improved performance in fading channels. The complexity of the optimal demapping process for rotated constellations is however significantly higher than for non-rotated constellations. This makes the DVB-T2 demapper one of the most computationally complex parts of a receiver. In this paper, we examine possible simplifications of the demapping process suitable for implementation on a general purpose computer containing a modern GPU (graphics processing unit). Furthermore, we measure the performance in terms of throughput of the proposed implementations. The implementations are designed to interface efficiently to a previously implemented real-time capable GPU-based LDPC (low-density parity-check) channel decoder.
Customized TTA Processor for efficient implementation of variable length FFT in SDR Systems
Tomasz Patyk (Tampere University of Technology, Finland); David Guevorkian (Tampere University of Technology, Finland); Teemu Pitkänen (Tampere University of Technology, Finland); Jarmo Takala (Tampere University of Technology, Finland)
In this paper, we describe a processor architecture tailored to mixed-radix-4/2/3 FFT algorithm. The proposed design supports FFT sizes 64-2048, and 1536 needed in different radios such as WLAN, LTE, DVB, etc. Thus different radios of a SDR system may use the same FFT implementation. The processor is based on the Transport Triggered Architecture (TTA) processor structure customized with a set of functional units. Those units were designed especially for the application at hand, that is, for radix-2/3/4 FFT butterfly operations. The proposed processor has been synthesized on a $130$ nm standard cell ASIC technology. Efficiency analysis illustrates that, while the developed processor is programmable, its efficiency is comparable to that of fixed-function ASIC implementations.
Platform Independent Implementation of MIMO OFDM SDR Applications - A Nucleus Based Approach
Daniel Guenther (RWTH Aachen University Germany, Germany); Torsten Kempf (RWTH Aachen University Germany, Germany); Marc Adrat (Fraunhofer FKIE / KOM, Germany); Markus Antweiler (Fraunhofer FKIE, Germany); Gerd H. Ascheid (RWTH Aachen University, Germany)
With the increasing amount of wireless communication standards, there is a growing demand for generic, flexible baseband processing platforms, implementing these standards in software and still fulfilling the real-time requirements. Different approaches for these software defined radios (SDRs) exist, but a common characteristic is that their hardware architecture reflects the data level parallelism inherent in typical baseband applications. Two common approaches are very long instruction word (VLIW) - and single instruction multiple data (SIMD) architectures. While the former allows combining several instructions into one macro instruction, so that they can be executed in parallel, the latter one enables applying the same operation to a set of data. Furthermore, hybrid architectures exist that combine both concepts.
Both concepts have their advantages and disadvantages. However, this paper focuses on the effect of these different solutions to the same problem on the programmers. How can they develop code that is fast and optimized enough to fulfill the tough real-time constraints of wireless communication standards on the one hand, but still flexible enough to quickly migrate from VLIW to SIMD or vice versa? This paper presents the Nucleus approach as a solution to this topic. The physical layer of a MIMO OFDM transceiver is chosen as target application to demonstrate the approach, since it combines state of the art wireless transmission with strict real time constraints.
According to the Nucleus concept, first the application is analyzed with respect to the reoccurring computational kernels (Nuclei). In MIMO OFDM applications, these Nuclei are commonly given by vector arithmetic operations. Also note that the Nuclei are purely algorithmic entities and not related to any platform. Former investigations have shown that typical MIMO OFDM applications can be composed by a few Nuclei only. For these Nuclei, platform specific, highly optimized implementations (Flavors) are developed, which are then put together by the Frame Code, which again is not specific to any platform. Thus, by solely implementing a small set of Flavors for the different target platforms and using the same Frame Code, different target platforms can be addressed and an application can be migrated quickly.
This paper demonstrates the above mentioned concept for a MIMO OFDM physical layer application based on the IEEE 802.11n standard. The TI C64x+ is chosen as a representative VLIW architecture, while the P2012 platform by ST Microelectronics serves as an example for a SIMD based platform.
Cooperative Actor Oriented Synthesis for FPGA-based MIMO-OFDM Detection
Yun Wu (Queen's University Belfast, United Kingdom); John McAllister (Queen's University Belfast, United Kingdom); Peng Wang (Queen's University Belfast, United Kingdom)
Massively parallel networks of fine-grained software-programmable processors on FPGA have shown tremendous potential as software-defined architectures capable of supporting Sphere Decoding (SD) for detection of Orthogonal Frequency Division Multiplexing (OFDM) Multiple-Input Multiple-Output (MIMO) channels - indeed it has enabled the only software-defined realisation of a 4×4 16 QAM 802.11n SD to date.
However, research to date has only proven the viability of the architectures to support real-time software-defined SD; the adoption of this approach is highly dependent on the ability of supporting synthesis methodologies and toolsets to support the designer in creating and programming the target multicore architectures. No such approach which results in the derivation of real-time solutions exists.
In this paper a cooperative application synthesis approach is presented which creates and maps SD applications specified as actor-oriented Dataflow Graphs (DFGs) onto such architectures in a semi-automated fashion is proposed. Multi-actor processing kernels are used as the starting point of the synthesis process, which automatically detects the kernels in the application DFG, derives a multi-SIMD architecture to support the application and maps and schedules the kernels onto the architecture. To demonstrate this process we will present implementations of Fixed-complexity Sphere Decoder (FSD) and Selective Spanning Fast Enumeration (SSFE) detection case studies for 4×4 16-QAM 802.11n MIMO, demonstrating the ability of this process to generate real-time implementations.
For communicating short data sequences over small distances, the use of devices with conventional RF interfaces requires standardized hardware, dedicated infrastructure appropriate Link/Network layer protocols. To address challenges associated with these requirements, a communication mechanism using devices which support simple audio interfaces (speakers and microphones) is proposed using the upper audio band (UAB) of frequencies (16-20KHz). The UAB modem is completely implementable in software and can be reconfigured easily. Devices with audio interfaces can be deployed easily in a personal area network for communicating at low data rates over small distances. The UAB radio has been designed with two essential components- a) Audio interface management. b) Reconfiguration management. The audio interface management component implements power and bandwidth efficient modulation and error control coding schemes, which can be reconfigured according to the throughput/data rate and performance requirements. The reconfiguration management component enables flexible spectrum sensing and provides a reconfiguration control of spectrum sensing and data transmission scheduling.
A binary/multi-tone FSK modulation can be used for transmitting Reed-Solomon encoded data over the upper audio band (UAB) of 16-20 KHz. Microphones placed appropriately can be used to sense the spectrum in an indoor environment for managing throughput in the presence of interference from adjacent sources of sound. For peer-to-peer communication applications, a spectrum sensing can be enabled and scheduled appropriately on the receiving device to avoid decoding errors due to interference. For broadcast applications, a central spectrum management entity can be used to sense the spectrum and the sensing results can be used to schedule the data transmission on connected speakers for managing throughput in the presence of interference.
A system prototype was developed using portable mp3 speakers and smartphones with sensitive microphones. Successful decoding of data was possible over distances of 8-10m. An appropriate deployment of speaker systems can be used for location estimation of devices in a closed room/retail environment.
Future work involves developing Standards for the proposed UAB based physical layer with appropriate system architectures, interfaces and link layer protocols for Interference/Network management, service discovery, contention and scheduling management and co-operation for reconfiguration of parameters. Secure transactions for banking and retail environments can be enabled using appropriate identity based public key/symmetric key ciphers. Spectrum decisions need to be configured based on parameters relevant to a spectrum band, such as primary user activity, interference, path loss, link errors and link layer delay.
Self-interference cancellation towards real-time spectrum sensing in vehicular dynamic spectrum access systems
Masaaki Ohtake (The University of Electro-Communications, Japan); Takeo Fujii (The University of Electro-Communications, Japan); Haris Kremo (Toyota InfoTechnology Center, Japan); Onur Altintas (Toyota InfoTechnology Center, Japan)
In this paper, we propose a new spectrum sensing scheme tailored for vehicular environments that can detect primary users while secondary user transmission is active in the same spectrum band. In general, it is not easy to detect weak primary signals when a secondary user is active due to difficulty of distinguishing the primary and secondary signals at the spectrum sensor. In order to solve this problem, we propose to jointly utilize a spectrum sensor with a dedicated antenna for spectrum sensing, and a secondary signal canceller for mitigating the effect of secondary signal. Here, the proposed sensing method utilizes a sensing equipment with a different antenna which is separated from the antenna of the secondary transceiver. Moreover, secondary signal is cancelled by using the replica of itself. This replica information is obtained from the secondary transmitter itself which is then used to detect the weak primary signal from the mixture of primary and secondary signals. For secondary signal cancellation (i.e. elimination of self-interference), we utilize a two stage technique. The first stage employs cancellation in the analog domain and the second stage employs cancellation in the digital domain. In the analog domain, self-interference created by the secondary is attenuated by antenna separation which is then cancelled with an inverse phase signal of itself. In comparison to handheld mobile terminals, such physical antenna separation can be made possible by using the roof of a vehicle. Next, in the digital domain, we utilize digital signal canceller based on minimum mean square error (MMSE) method. We evaluate the performance by using computer simulations and confirm that the self-interference created by the secondary signal itself can be mitigated and the primary signal detection performance can be improved.
Ultra-wideband Digital Beamformer with Significant SWAP-C Reduction
Elias A Alwan (The Ohio State University, USA); Sidharth Balasubramanian (The Ohio State University, USA); Jad G. Atallah (Notre Dame University - Louaize, Lebanon); Matthew Larue (The Ohio State University, USA); Kubilay Sertel (The Ohio State University, USA); Waleed Khalil (The Ohio State University, USA); John L. Volakis (Ohio State University, USA)
The availability of small ultra-wideband (UWB) conformal apertures can provide a new paradigm in the way we collect and process information. However, the utilization of this bandwidth imposes several requirements on the UWB aperture: (a) a wideband feed network, (b) scanning down to low angles over the entire purported bandwidth (at least down to 70o), and (c) scalable and power-efficient digital back-ends to realize digital beam forming for cognitive sensing. It is important to note that traditional apertures with beam forming networks are narrowband in nature. Hence, it goes without saying that the need for wideband feeding (using very minimal real estate), necessitates digital beam forming, a concept that has not been fully demonstrated. Indeed, the successful integration of wideband back-end components into a single conformal structure (that is concurrently of low cost, low weight, and highly multifunctional) would lead to transformational utilizations of wideband phased arrays.
We propose a novel transceiver architecture for cognitive sensing that permits agile beam forming and jamming mitigation, in addition to offering full MIMO capability. An essential aspect of the new architecture is its departure from the traditional approach to employ individual ADCs behind each antenna element. Instead, a single ADC is assigned to a group of array elements, allowing significant reduction in the back-end circuit. For UWB reception, the receiver is further channelized into multiple sub-bands using a bank of mixers and low pass filters. Here also, we employ a single ADC for each sub-band (see Fig. 1). To guarantee full signal recovery after digitization, code division multiplexing (CDM) is carried right after mixing (CDM serves to identify the signal with a specific receiving antenna element). The received signals are subsequently summed into a composite signal without loss of source identity and processed by a single ADC.
Real Time Spectrum Sensing by using Frequency Shifted Sensor for Spectrum Sharing Cognitive Radio
Masayuki Kitamura (The University of Electro-Communications, Japan); Takeo Fujii (The University of Electro-Communications, Japan); Masaaki Ohtake (The University of Electro-Communications, Japan); Yuya Ohue (The University of Electro-Communications, Japan)
In this study, we propose a real-time spectrum sensing method by utilizing the characteristic of the secondary user (SU) which occupies narrower bandwidth under the wide band primary user (PU) channel. The proposed sensing function utilizes the different frequency for sensing from the frequency for data communication. Here, SU is equipped with a dedicated radio transceiver for sensing with different antenna from data communication and the frequency for data and sensing belong to the same spectrum of wide band PU. However, this configuration degrades the PU sensing performance due to the influence of the signal from its own SU transmitted at near frequency. In this research, we implement this configuration to USRP N210, to evaluate the sensing performance experimentally to confirm the effect of the SU signals transmitted at near frequency toward sensing performance. From the experimental results, we can confirm that the propose method can achieve real-time sensing if we can reduce the very large signals inputting to the sensing device by separating the antenna distance from the SU transmitter and the sensing radio.
Using Simulation to Improve Emitter Classification and Location Techniques in Complex Physical and Spectral Environments
David A Leiss (Agilent Technologies Inc., USA); Chris Kucera (AGI, USA)
Tradition techniques of classifying and locating friendly and unfriendly emitters, whether in hilly terrain or in urban environments, is difficult enough, but when complex spectral environments are added into the mix, it can become a nightmare. This presentation will demonstrate the combination of modeling techniques to perform: Dynamic vehicle analysis with realistic environmental effects (E3) modeling. The inclusion of both custom and industry standard compliant physical transmitters and receivers using measured, legacy or the latest LTE advanced waveforms, along with the DSP and RF modeling. This gives users the ability to investigate the interplay between vehicle dynamics and spectrum usage and interference effects.
For many decades, spectrum analysts have worked in an offline fashion to mitigate radio frequency interference with limited success. This lack of realistic spectrum awareness coupled with the inability to dynamically model moving objects has given rise to the need for better modeling of the spectrum in operational systems.
This presentation will discuss the combination of new technologies that can be used to inject RF communications systems models into operational systems to allow for better signals intelligence, cyberspace awareness and also offer a means to obtaining better tipping and queuing for ISR reconnaissance across multiple intelligence domains.
Improving interoperability trough gateways and COTS technologies
Jaco Meintjes (Council for Scientific and Industrial Research, South Africa ), Rafael Aguado (Global SDR, Spain); Corné Smith (Council for Scientific and Industrial Research, South Africa)
Nowadays, Joint Interdepartmental and Multinational (JIM) and Other Than War (OTW) operations share a common problem. Most of these kind of operations need to handle heterogeneous communications, in different flavors: + Different form factors + Different waveforms + Different degree of security + Or even different technology Current RF gateway solutions comprise big investment in different propriety communication infrastructures that route voice and data information between communication infrastructures. Current solutions are big and physically demanding and have to accommodate the form factors of numerous communication systems. The management of current RF gateway solutions require continuous integration management of new infrastructure whilst performing obsolescence management of legacy systems. Due to these constraints, mobile RF gateways tend to be complex to integrate and clumsy to operate. The paper presents a feasible solution introducing the concept of RF gateway. The purpose of the RF gateway is to act as a proxy to enable communication among different stakeholders in the field, using different communication mechanisms. The paper presents the SCA technologies as enablers of this solution. The final configuration will provide different channels and degrees of security in order to provide successful communication among all the different corps. The SCA provides the infrastructure in order to reuse and share developments, shortening the overall development efforts. The development of the Gateway will be based in reliable COTS technology. The solution presented in the paper will include the usage of a Spectrum Signal Processing SDR 4902 as a backbone for the gateway, this solution includes among others the SCA certified CRC CF as well as the OIS Middleware. The SCA solution will have a small form factor, be scalable, reconfigurable and can accommodate new waveforms with ease. This allows the SCA solution to support obsolescence management and new waveforms without form factor implications over a long life cycle. Finally, The purpose of using COTS technology is double: + Reduced testing and developing time. The technology included in the solution has already been tested, certified and deployed to work properly under the circumstances exposed in the previous chapters. + Economy of scales. The use of these technologies socializes and specializes the development of the different components, making possible a final cost reduction.
On Future Aeronautical Communications Standards: a Real-Time, Fully-Software AeroMACS waveform implementation based on the SCA-compliant OSSIE/USRP2 platform
Mario Di Dio (University of Pisa, Italy); Daniele Bolognesi (University of Pisa, Italy); Massimiliano Francone (University of Pisa, Italy); Marco Luise (University of Pisa, Italy)
The air transportation market is expected to double by the 2025 and the current air traffic systems will not be capable to satisfy this growth. In particular, new security requirements are requested, for example, to efficiently move people and cargo. Focusing on communications issues, it is possible to identify some critical aspects to improve: pilots situation awareness, Airline Operation Center (AOC) data traffic capacity, passengers and cabin communications systems. The solution for these critical aspects is the convergence of protocols and interfaces towards a new open system that is the result of the collection of different communications technologies tailored for a specific operational setting. In this scenario, the key-concepts are the flexibility and the interoperability among the legacy communications systems and the new high-capacity communications standards. The challenge of this approach is to increase the capacity, security and efficiency of the aeronautical communications with no or small increase of the complexity and cost of the on-board equipments.
This has been also the objective of SANDRA (Seamless Aeronautical Networking though integration of Data links Radios and Antennas) [1], a research project financed by the European Commission and involving some academic research centres, like the University of Pisa, and some of the major players of the European telecommunications market. The final scope of the SANDRA project has been the integration at different levels, from antenna to the network layer, of several communications standards (analogue VHF, VDL2, B-GAN, AeroMACS) on a reconfigurable Integrated Modular Radio. The core of this project is the Software Defined Radio (SDR) approach in which reliable communications and interoperability among different standards, on the same reconfigurable hardware platform, can be easily provided by the Software Communications Architecture (SCA).
As known, SCA [2] is a non-proprietary, open architecture framework, created to solve the arising issues, especially in the military field, of the development of a programmable, modular, multi-mode radio. The SCA provides complete interoperability among the software defined radios (SDRs) implementing different radio communications standards (that are called in the SCA parlance waveforms), and high portability among heterogeneous hardware platforms (GPP, DSP, FPGA, etc). SCA is not a system specification, as it is intended to be implementation-independent, but rather a set of design constraints. To sum up, the main advantages of this approach are: the greater portability of source/object code; the full interoperability among the SCA-compliant software-defined radios and the easy upgrade to further standard evolution.
This work can be considered as the joint result of the contributions of University of Pisa in the analysis of AeroMACS waveform in the SANDRA project and the SDR background of the University of Pisa, Digital Signal Processing Communications Laboratory (DSPCoLa) in implementing fully-software SCA-compliant waveforms [3]. The paper describes the implementation of a real-time, fully-software SCA-compliant AeroMACS waveform [4], the WiMAX IEEE 802.16e standard for ATS/AOC communications. As indicated in the SESAR/FCI recommendations, AeroMACS will provide the airport connectivity in the near future. Our implementation is based on the well-known Universal Software Radio Peripheral v2.0 (USRP2) hardware. Specifically, the USRP2 provides the digital to analog conversion and baseband-to-RF conversion in the transmitter and the RF-to-baseband conversion including analog to digital conversion in the receiver. All baseband functions are implemented through an efficient C++ code that was developed from scratch at the DSPCoLa. In particular, the AeroMACS waveform was implemented on a C++-based SDR framework, namely OSSIE [5], which is an open source SDR environment developed at Wireless@Virginia Tech. The software package includes: an SDR core framework based on SCA; the Waveform Workshop, a set of tools for rapid development of SDR components and waveforms applications; and an evolving library of pre-built components and waveform applications.
In the paper, we detail the architecture for the AeroMACS waveform, by analysing the functional blocks implementing the diverse signal processing functions. In particular, we analyse the software structure of the code focusing on the computational load required by each processing block. We show how the real-time performance was reached using a programming technique that we called Memory Acceleration (MA) [6]. MA belongs to the broader class of optimizations known in computer science literature under the collective denomination of space/time trade-off. This technique is basically composed by two algorithmic procedures called respectively the Algorithm Segmentation and the Recursive Table Aggregation Rule with which is possible to re-implement a signal processing function in a memory-aware fashion.
Performance results in terms of computational load, occupied bandwidth, signal acquisition and sensitivity are also provided to demonstrate the capability of the SCA-compliant communications chain to set-up, ''put on-air'' and receive a standard AeroMACS signal.
The implemented waveform has to be intended as a proof-of-concept of implementing a fully-software, high data-rate AeroMACS waveform using only commercial GPPs as computational asset of the entire system. It is also ideal for education, testing and product-development and it can be used as a reference implementation to test and validate the actual portability and interoperability of a SCA-compliant waveform.
[1] SANDRA project. http://www.sandra.aero
[2] SCA 2.2.2 http://sca.jpeojtrs.mil/
[3] M. Di Dio, A. Morelli, M. Luise,''A Real-Time, Fully-Software VHF aeronautical tx/rx waveform based on the SCA-compliant OSSIE/USRP2 platform'', in Proc. Karlsruhe Workshop on Software Radios (WSR), Karlsruhe, Germany, Mar. 2012
[5] OSSIE, SCA-Based Open Source Software Defined Radio http://ossie.wireless.vt.edu/
[6] V. Pellegrini, M. Di Dio, L. Rose, M. Luise,''On the computation/memory trade-off in software defined radio'', in Proc. IEEE Global Telecommunications Conference (GLOBECOM), Miami, FL, USA, Dec. 2010.
The SCA and DO-178B Avionics Certification - Challenges and Suggestions for Mitigation
A Modern Software Defined Radio (SDR) is often considered equivalent to an SDR that is developed according to the Software Communications Architecture (SCA) standard as initiated by the JTRS program. For airborne SW applications, however, the SW design assurance standard DO-178B, which is compulsory for civil avionics SW, becomes more and more a requirement also for military equipment. The reasons for this are manifold: for example, the utilization of military aircraft in civil operations like disaster recovery, or flight routes that utilize civil airspace. In addition to that, mission critical military applications like friend or foe detection call for the same rigor in development assurance as safety critical applications, and as a result of the Perry memo the application of civil standards like DO-178B has become first choice. Some quality objectives of DO-178B are very difficult to meet by an SCA-based radio. This paper summarizes the main quality objectives of the DO-178B, and identifies the corresponding problem areas of the SCA. Finally, some measures to mitigate the colliding objectives of both standards are suggested.
Implementation of MCP-based WiMAX receiver test-bed for reconfigurable SDR handset
Hyungsub Lee (University of Hanyang, Korea); Hantaek Kim (Hanyang Univ, Korea); Chiyoung Ahn (Hanyang University, Korea); June Kim (Hanyang University, Korea); Sungsoo Ahn (Myongji College, Korea); SeungWon Choi (Hanyang University, Korea)
This paper presents an implementation of MCP(Mobile Computing Platform)-based SDR(Software Defined Radio) handset platform, of which the main objective is to verify the feasibility and performance of baseband interface of reconfigurable SDR handset that is being standardized in ETSI(European Telecommunications Standards Institute) RRS(Reconfigurable Radio Systems). SDR platform in general requires a lot of arithmetic signal processing procedures, which brings about several restrictions in implementing the SDR platform using MCP because MCP consists of mobile processor only. In order to resolve those restrictions, we have adopted OMAP(Open Multimedia Application Platform) SoC(System on Chip) as a software modem platform, which itself is a mobile processor consisting of ARM(Advanced RISC Machine) and DSP(Digital Signal Processor) that are capable of high-speed digital signal processing. We propose an MCP-based SDR platform architecture that fully supports on-going ETSI RRS standard using OMAP SoC and FPGA(Field Programmable Gate Array)s. The proposed software architecture consists of AP(Application Processor) and RP(Radio Processor). ARM processor makes the AP providing the functionality of mobile OS(Operating System) driver and flexible control of reconfiguration of software modem, while FPGAs and DSP make RP providing the functionality of digital signal processing in PHY(Physical) layer. In order to verify the proposed architecture, WiMAX waveform has been selected for the proposed receiver test-bed. FPGA has been adopted for implementing Viterbi decoder because it requires the largest amount of computational load among all the PHY layer parts of implemented test-bed, while the other PHY layer parts (FFT(Fast Fourier Transform), channel estimation, soft decision, etc.) have been implemented on DSP. Performance of the implemented test-bed is shown in terms of software modem run-time, which guarantees that the baseband signal processing in accordance with the ETSI RRS standard can fully be supported by the proposed MCP-based platform test-bed in real-time.
Implementation of LTE Uplink system for Software Defined Radio Platform using CUDA and UHD
It was demonstrated in [1] that SDR (Software Defined Radio) platform can be implemented on a normal PC (Personal Computer) together with USRP2 (Universal Software Radio Peripheral 2) board which adopts GNU radio for its RF function block libraries and CPU (Central Processing Unit) for its software modem. In this paper, we present a novel implementation of SC (Single-Carrier) - FDMA (Frequency Division Multiple Access)-based LTE (Long Term Evolution) uplink system, i.e., 3GPP (3rd Generation Partnership Project) Release 9 standard, on a SDR platform using a conventional PC, which adopts GPU (Graphics Processing Unit) instead of CPU and USRP2 boards with UHD (Universal Hardware Driver) instead of GNU radio for SDR software modem and RF transceiver, respectively. Hardware of USRP has originally been designed for supporting GNU radio which is a software tool for runtime signal processing. Noting that USRP hardware can be interfaced with customized C++ code by using UHD, we have adopted UHD instead of GNU radio in order to achieve a lot higher degree of flexibility in the design of transceiver chain. In addition, UHD also provides a lot wider set of Application Programming Interfaces (APIs) for interfacing the host computer with the USRP2 board compared to GNU radio. Meanwhile, in order to cope with an extremely high-speed data rate in modern communication systems, the processor for SDR-based signal processing should support the high system throughput and high operation speed. Although multi-core CPU in PC could also be substituted for the DSPs and FPGAs, it would decrease the speed of the other tasks originally assigned to the CPU of the computer. Considering that GPU is suitable for parallel computing due to its powerful arithmetic logic units, software modem in our system is implemented on GPU board. We implemented LTE Uplink system using GPU and USRP2 with UHD. The video streaming data, which are given in accordance with the 3GPP standard of LTE Uplink frame, are sent to the USRP2 by the UHD at the transmitting mobile terminal. The USRP2 hardware performs digital frequency-up conversion and RF conversion before sending the samples over the air. In the receiving base station, the reverse operations are performed using GPU and USRP2 with UHD. We demonstrate real-time performances of our implemented system. Experimental results such as BER (Bit Error Rate), FER (Frame Error Rate), throughput, etc will be presented and compared to computer simulated performances. [1] Jorgensen, P.B.; Hansen, T.L.; Sorensen, T.B.; Berardinelli, G, "Implementation of LTE SC-FDMA on the USRP2 Software Defined Radio Platform", Communication Technologies Workshop (Swe-CTW), IEEE Swedish, pp. 34-39, Oct. 2011.
A software defined radio modeling framework for enabling cognitive applications
Christopher Sapello (Applied Communication Sciences, USA); Adarshpal Sethi (University of Delaware, USA); Constantin Serban (Applied Communication Sciences, USA); Cho-Yu Jason Chiang (Applied Communication Sciences, USA); Kim Moeltner (US Army CERDEC, USA)
Software defined radios represent one of the major advances in the area of digital communication, promising to alleviate spectrum shortages by enabling agile frequency reuse, and providing a cost-effective way to implement multiple waveform capability using a single hardware platform. One of the most attractive benefits of software defined radios is their ability to enable the creation of resilient wireless networks capable of adapting to highly variable environment conditions, and at the same time maintaining network transfer capabilities in a cognitive manner. While the ultimate performance of the radio transceivers and their networking capabilities are evaluated through carefully designed field tests, highly detailed and accurate simulation models of such radios are essential for the creation and validation of cognitive algorithms capable of turning disparate radio terminals into a coherent network. Simulation models enable: i) the thorough testing of the radio capabilities in situations not easily reproducible in field tests, ii) scalability of tests where large network studies are otherwise difficult to carry out as they would require a large number of radio equipment and a large amount of time, and iii) use of virtual resources, such as spectrum bands, instead of physical ones, without any administrative and regulatory constraint.
In this context, the creation of a simulation model capable of providing an experimentation platform for cognitive adaption functions under realistic load patterns and environmental conditions is both unique and challenging in several aspects. First, software defined radios may exhibit large communication delays between the software-defined link layer and the radio front end (hardware), a delay not encountered in hardware radios and often not accounted for in simulation models. This delay, introduced by the software domain and dependent on the load and dynamic configuration, not only impacts the processing time of packets but also delays the link layers ability to carrier sense the channel, thus significantly affecting the performance of the radios in a shared environment. Second, software defined radios are often highly configurable across a wide range of parameters, being capable of changing their functionality dynamically, during operation, in an independent, radio-by-radio manner. Traditional network models, with roots in hardware devices, do not enable such tunability and composability, thus limiting their use when developing cognitive adaptation strategies. And last, traditional network models do not operate on real application data from a live network and live applications. Such simulator-in-the-loop capability, however, is crucial for testing the impact of the software-defined radio network on actual applications and the effect of complex cognitive algorithms on the network itself.
This paper describes our work in creating a simulation model framework for software defined radios designed to addresses these unique characteristics. The creation of such a model framework is challenging due to several factors. First, timing issues unique to the software-defined radios have not been fully considered in existing network simulation models. While delays are easy enough to deal with in general by simply increasing the event-times, an accurate representation of the timing of communication requires a faithfully representation of the internal structure of the software radio and the computational cost of its software functions.
Other aspects, such as the capability to satisfy arbitrary requests for information necessary to perform environment awareness functionality requires a new methodology for modeling to be both efficient, (i.e. not performing continuous computations,) and to accurately capture the effects of the computational delays. This becomes even more challenging when the parameters of individual radios can be changed dynamically, at runtime, rendering common modeling approaches such as global propagation tables unusable.
Finally, creating a model for simulator-in-the-loop in which simulations may have a long-term evolution required us to bring together a number of modeling techniques, such as obstacle modeling, interference modeling, and multichannel modeling, in a single model using a dynamic control capability. These independent pieces have to fit together to cooperate with one another during a single simulation run.
The simulation model framework described in this paper was built using the ns-2 (Network Simulator,) a free, open-source, and widely used simulation platform. As referent software defined radio, we used the GNU radio, a free and open-source software development toolkit available under the GNU General Public License. The model framework was designed such that it can be easily applied to other software-defined radios. Our extensive software defined radio model consists of a MAC layer, PHY layer, and wireless channel. The MAC layer includes a model for a channel coder which can be changed during runtime. The new wireless channel model allows not only the PHY layer to communicate with multiple channels, but also creates a new division of labor in which errors, obstacles and power attenuation due to distance are handled in the channel rather than in the PHY layer code, as encountered in standard ns-2 implementation. This new division of labor caused us to introduce a new modeling concept called a channel end-point to handle spatially dependent computations.
This paper begins with a background on the GNU Radio platform we wish to model and an overview of the standard ns-2 network simulator. It then provides a closer look at the above objects, indicating their interfaces and differences from the standard models for hardware radios. This is followed by two sets of results. The first set of results provides a validation study of our model implementation compared to the reference GNU Radio performance. The second set of results shows how this network model would scale, demonstrating the advantage of the model. We conclude the paper by discussing how the GNU Radio specific model could be adopted to model other software-defined radio testbeds.
Cognitive Radio Equipments Modeling: Meta-Model and Tooling Proposals
Oussama Lazrak (IETR/SUPELEC, France); Christophe Moy (SUPELEC/IETR, France); Pierre Leray (IETR/Supelec Campus de Rennes, France)
We propose in this paper a Model Driven Engineering (MDE) approach for the design of Cognitive Radio (CR) equipments.
MDE consists in describing the system at different levels of abstraction, from a high level abstraction representation (often graphical) downto the code to be executed on a specific platform (could be made of pieces of hardware - e.g. executed on ASICs or FPGAs - and software - e.g. executed on DSPs or GPPs) [1][2]. An MDE design approach relies on model transformations to go from one level to another. As several levels of abstraction and representation could be used, then several model transformations should be defined [3].
This approach for CR design supposes that there exists a universal language that any designer in the community may understand. Associated to this language, a design environment should provide the adequate tooling to design the models at each level of abstraction relatively to CR design needs. We have previously proposed the HDCRAM (Hierarchical and Distributed Cognitive Radio Architecture Management) metamodel in that sense [4]. HDCRAM is a set of rules to respect in order to generate models compatible with the metamodel we defined for CR. HDCRAM metamodel, as UML or SysML, is defined by a meta-metamodel (MOF: Meta Object Facilities) that is self-defined. MOF is the highest level of modeling.
Eclipse Modeling Framework (EMF) provides a MOF implementation we used to create our HDCRAM metamodel. Several frameworks have been developped on a EMF basis, such as GMF (Graphical Modeling Framework) which offers graphical representation facilities to EMF. So we have been using GMF to develop a graphical development environment For CR design. This CR design environment, based on EMF and HDCRAM, can be used to design CR equipments through the simple adding of an Eclipse plugin in an already existing design framework.
GMF editor generation is done through the association of several models. Domain model here is HDCRAM. Graphical Def Model defines the way a component of the metamodel will be seen by the user (a box, or an arrow, etc.). This model has been developped in accordance with UML standard. Def Model Tooling is used to define components proposed on the graphical editor (palettes, menus, etc.) . A Mapping Model is used to join all previous models before editor's generation.
We will show in the paper how this environment is used for the design example of a CR equipment able to operate opportunistic spectrum access.
[1] S. Rouxel, J.P. Diguet, N. Bulteau, J. Carre-Gourdin, J.E. Goubard, C. Moy, UML framework for PIM and PSM verification of SDR systems, SDR Forum Technical Conference'05, Anaheim, USA, November 2005 [2] "PIM and PSM for Software Radio Components" Final Adopted Specification, dtc/04-05-04, http://www.omg.org/docs/dtc/04-05-04.pdf [3] S. Lecomte, S. Guillouard, C. Moy, P. Leray, P. Soulard, "A co-design methodology based on Model Driven Architecture for Real Time Embedded systems", Mathematical and Computer Modelling Journal, doi:10.1016/j.mcm.2010.03.035, Vol. 53, Issues 3-4, pp. 471-484, Feb. 2011 [4] L. Godard, C. Moy, J. Palicot,"An Executable Meta-Model of a Hierarchical and Distributed Architecture Management for the Design of Cognitive Radio Equipments", Annals of Telecommunications, Special issue on Cognitive Radio, July-August 2009
Automatic Modulation Recognition Using DWT-Based Signal Templates
Yao Ge (Rutgers University, USA); David G. Daut (Rutgers University, USA); Ka Mun Ho (Rutgers, the State University of New Jersey, USA); Canute Vaz (Robertson Technologies, USA)
The wavelet domain (WD) Automatic Modulation Recognition (AMR) process described in this study is a
baseband signal processing strategy that involves the use of the Discrete Wavelet Transform (DWT). In particular, the DWT is employed in conjunction with unique wavelet domain features templates that are associated with digitally modulated signals representing signal features that distinguish the waveform transitions present due to different data symbols. These transitions are indicated by a change in the amplitude, frequency and/or phase of a digitally modulated signal. It is established that this set of templates is suitable for the blind identification of binary digitally modulated communications signals acquired by a communications receiver.
The specific modulation schemes considered are BASK, BFSK, and BPSK. The wavelet used for template construction and the decomposition of received signals is the Daubechies 1 (Haar) wavelet. It has been determined via extensive computer simulation that the rate of correct classification for BASK signals is 100% over the entire SNR range considered. The rates of correct classification for BPSK signals are 100%, 96.8%, 95.6%, and 94.8% for SNR = 10 dB, 5 dB, 0 dB, and -5 dB, respectively. The rates of correct classification for BFSK signals are 98.0%, 96.2%, 100.0%, and 97.0% for SNR = 10 dB, 5 dB, 0 dB, and -5 dB, respectively. The AMR process presented in this study generally produces higher rates of correct classification than other AMR techniques available in the literature.
The modulation classification performance achieved by the DWT-based AMR algorithm operating at baseband provides an effective platform to realize the implementation of reconfigurable and agile transceivers.
Parallelization of Turbo decoder and Its Implementation on GPU for SDR-based LTE system
In this paper, we first presented a parallelized turbo decoding algorithm, which is widely used as a tool for FEC(Forward Error Correction). Then, the proposed parallelized algorithm was implemented on a GPU(Graphic Processor Unit) board. We analyzed the performance of implemented turbo decoder on a SDR(Software Defined Radio)-based LTE(Long Term Evolution) system. Turbo code is one type of error correcting codes, which is an efficient countermeasure against errors occurred by noise, fading, and interference generated in various kinds of adverse communication channels. For that reason, turbo codes have been adopted in many communication standards such as WiMAX(Worldwide Interoperability for Microwave Access), WCDMA(Wideband Code Division Multiple Access), LTE, etc. However, since the MAP(maximum a posteriori) decoder, which is a core part of turbo decoder, needs excessive memory requirements and heavy computational complexity, implementation of turbo decoder on SDR system brings about many severe difficulties in practice. Especially, a turbo decoder requires very long processing time due to the fact that two MAP decoders inside the turbo decoder should exchange received data to be decoded from one to the other in order to resolve errors in the received signals. The proposed parallelization algorithm tremendously reduces the decoding time caused by the pair of MAP decoders. After analyzing the performance of the proposed parallelization algorithm, we implemented the parallelized turbo decoder on a GPU, which itself is a high-speed parallel processor. From experimental results obtained from implemented turbo decoder on both Xilinx Virtex-5 XC5VSX35 and TI TMS320TCI6488 TCP2(Turbo-DecoderCoprocessor2), we have verified that the throughput rate is remarkably increased by the proposed parallelization procedure.
Freezing-based Scheme for the Fixed-point Implementation of Min-sum LDPC Decoding
Mehrzad Malmirchegini (University of New Mexico, United States), Shadi Abu-Surra (Samsung Telecommunications America, United States), Thomas Henige (Samsung Telecommunications America, United States), Eran Pisek (Samsung Telecommunications America, United States)
In this paper, we statistically analyze the impact of the quantization and the fixed-point implementation on the performance of the min-sum LDPC layered decoding algorithm. In particular, we show how the growth of the LLR (Log of Likelihood Ratio) values under finite precision results in the saturation and performance degradation. We then propose a freezing-based min-sum decoding algorithm for the fixed-point implementation. We show that the proposed approach overcomes the saturation problems at high SNRs and improves the decoding performance drastically. Furthermore, we discuss an optimum uniform quantization scheme, which minimizes the quantization error of the channel LLR values.
A New Channelizer-Based Down Converter Architecture for Receive Uplink of Combined 3GPP LTE and WCDMA Radios
Elettra Venosa (San Diego State University, USA); Frederic j harris (San Diego State University, USA); Chris Dick (Xilinx, USA); Xiaofei Chen (San Diego State University, USA)
The desire, common in the wireless industry, of achieving multi-purpose front end radios while maintaining good performance and low cost drives us to explore novel designs for digital down converter (DDC) architectures. In this paper we present a DDC for combined LTE and WCDMA signal. The architecture is based on a modified version of the standard polyphase down converter channelizer. The result is a customized solution which guarantees good performance and great efficiency. The proposed DDC is implemented as a 24-path polyphase channelizer which performs 6:1 down sampling of the input time series. 19MHz-wide filter with 20% excess bandwidth has been designed as a low-pass prototype. The channelization process places 24 channels, with the center frequencies equally spaced 5MHz apart, over the total spanned frequency range. Complex mixers and post processing filtering tasks could be required for input signal bands composed of multiple spectra. An arbitrary interpolator, designed in a 32-path polyphase fashion, is also included in the design at the end of the DDC chain to achieve the desired output sample rate.
A New Channelizer-Based Up Converter Architecture for Transmit Downlink of Combined 3GPP LTE and WCDMA Radios
Xiaofei Chen (San Diego State University, USA); Frederic j harris (San Diego State University, USA); Chris Dick (Xilinx, USA); Elettra Venosa (San Diego State University, USA)
The desire, common in the wireless industry, of achieving multi-purpose front end radios while maintaining good performance and low cost drives us to explore novel designs for digital up converter architectures. In this paper we present a DUC for combined LTE and WCDMA signals. The architecture is based on polyphase up converter channelizer. The need to accommodate the wide variety of input signals which are involved in the specific application case, drives us to design a modified version of the standard channelizer architecture. The result is a well customized solution which guarantees good performance and great efficiency (in terms of number of multipliers). The proposed DUC is implemented as a 24-path polyphase channelizer which performs 1:6 up sampling of the input time series. 19MHz-wide filter with 20% excess bandwidth has been designed as a low-pass prototype. The selection of the filter band-pass has been driven by the largest signal bandwidth which could enter the system. The channelization process places 24 channels, with the center frequencies equally spaced 5MHz apart, over the total spanned frequency range. The channel spacing has been selected according to the smallest signal bandwidth that could enter the system. Complex mixers could be required for input signal bands composed of multiple spectra. An arbitrary interpolator, designed in a 32-path polyphase fashion is included in the design at the beginning of the DUC chain to achieve the desired output sample rate.
Can an Added Value be offered to SDR Operators in Scenarios where Interoperability to Legacy Radios is a Requirement?
Marc Adrat (Fraunhofer FKIE / KOM, Germany); Tobias Osten (Fraunhofer FKIE / KOM, Germany); Jan Leduc (Fraunhofer FKIE / KOM, Germany); Markus Antweiler (Fraunhofer FKIE, Germany); Harald Elders-Boll (University of applied Science Cologne, Germany)
The novel Software Defined Radio (SDR) technology allows taking the next step in the evolution of military tactical communications. SDRs allow military radio operators to change waveforms on-the-fly according to the mission needs. On the one hand, new wideband networking waveforms will offer new services like high data throughputs and MANET capabilities. On the other hand, legacy waveforms will ensure interoperability to legacy equipment in missions where both types of radio equipment are deployed at the same.
In this paper, we analyze if an added value can be provided to the operators at SDRs hosting an 'enhanced' legacy waveform. This enhancement shall be introduced such that interoperability to the legacy equipment is still guaranteed.
Validating, Verifying and Certifying complex SDR Applications
Ken Dingman (Harris Corp, USA)
As the demands for battlefield communications continue to increase the complexity of the waveform applications employed to meet these demands grows in relationship. With the increased complexity of the solution comes the challenging problem of validating, verifying and certifying those solutions. An additional aspect of the problem is the rate of change being driven by the fielding of new technologies and the ability of certification organizations to maintain pace with it. Approaches to validation differ depending on the completeness of the user expectations and requirements of the application being developed. In any case it's imperative to understand the operational needs and time to market requirements to ensure the timely completion of the right functionality to meet the user expectations. This presentation will examine approaches we have used to validate the operational and time-to-market requirements for networking and narrowband waveforms. Verification of waveform applications and wideband networking WFs in particular is very challenging due to the dynamic operational environment the WF can execute in as a result of changing channel conditions and the movement of users in and out of a network and other external factors. This presentation will examine the innovative approaches to verification that have been undertaken in order to address these challenges. The path to certification can lead in different directions depending on a number of factors, including a standards maturity. The presentation examines factors that impact the approach to certification, lessons learned from numerous certification activities and proposes strategies to minimize cost and time-to-market impacts while protecting a company's intellectual property.
A MANET based on a SDR with Simultaneous Multiple Channel Reception
Moshe Miki Weiss (RAFAEL - Advanced Defense Systems, Haifa, Israel); Michal Wermuth (Rafael - Advanced Defense Systems LTD, Israel), Alexander Normatov - Presenter (RAFAEL - Advanced Defense Systems, Haifa, Israel)
Scalability and efficient, flexible spectrum utilization are among the difficult challenges of modern military Mobile Ad Hoc Networks (MANET), both for ground or airborne forces. Commonly, a large frequency range (e.g., UHF from 225-400 MHz) is allocated to a large military organization (Division, Corps etc) operating in a wide arena. In common MANET systems, the radio can receive only one channel at a time (per band, in a multiple band SDR); once the channel frequency has been set, the networking is carried on only among the members (Tanks, APCs, Aircrafts…) that are tuned to that channel, and the MAC algorithm is blind to all other channels. Although the frequency can be selected among many, once it has been chosen, it becomes unrelated to the networking operation. Thus, a MANET system with a collection of channels is in fact a collection of unconnected parallel MANET systems, with data rate limited by the bandwidth of a single channel. In every channel, a different MANET is established, and the participants of that MANET run distributed algorithms to decide how to divide the channel between them, commonly an adaptive TDMA MAC algorithm. In this scheme, a member is assigned either to a unit network (Company, battalion, A/C formation…) or a functional network (Operations, Intelligence, Fire support, Logistics...), where each of these networks is associated with a single frequency channel. However, during combat dynamics, units mix geographically; they merge, pass-through each other or split - members need also to communicate with members of other networks in their neighborhood, for Situation Awareness (SA), Fratricide and Collision Avoidance (FA, CA) etc. These message types have geographical vicinity context - Cross or Inter-channel networking is a paramount need. Accomplishing this need with a single channel receiver (per band) is difficult and inefficient - it is sometimes done with either a node time-sharing its network participation between an Intra-Unit network and a geographical Inter-Unit network, or by inter-channel gateways with multitude of multiple transceiver SDRs. Another approach is frequent reconfiguration of the network participation of a node - not only it causes delays and control overheads, it doesn't solves a member's need to concurrently participate in several networks. All these approaches are not scalable - 1) The time-sharing scheme results in a very low throughput for the Inter-Unit SA messages, since the data rate in a single channel network is inversely proportional to the number of members time-sharing it. Moreover, during the Inter-Unit time period, the entire allocated spectrum except a single channel is not used. 2) In the radio-gateways approach, the same information is re-transmitted again in all destination channels thus reducing capacity. Another property of military MANETs is a large asymmetry between transmission and reception - most members need to receive much more data than they transmit. This is typical for SA/CA messages, where a member periodically transmit its position, velocity vector and status to numerous (could be hundreds) other members. Another case is when few sensors transmit high rate data to numerous members in the area. It is shown that this asymmetry translates to network bottlenecks caused by the reception rather than the transmission capability of a SDR transceiver. All of the above challenges are solved when a node's SDR has many reception channels, ideally being able to simultaneously receive all the frequency channels in its allocated band. RAFAEL BNET family of SDRs, utilizing the latest technological advances of ultrafast (Giga-samples/sec), high dynamic range ADCs and ultrafast (Tera ops/sec) FPGAs, is a new generation of "Almost Ideal" SDRs, in which digitization is done close as possible to the Antenna. BNET SDR is not the traditional Super-Heterodyne; rather, it consists of a digital Channelizer, simultaneously processing hundreds of channels. In the MCR MANET architecture, the Modem functions are performed on all channels. A distributed, "two dimensional" F/TDMA MAC algorithm determines for each node at each time-slot in what channel to transmit. All received packets are available to the higher network layers, which process and filter them according to their destination. Hence, the MCR scheme breaks the usual "Channel = Network" relation; channels are assigned by the MAC to users and communication service types according to their link state and QOS requirements, in a manner transparent to the users. Networks are logical rather than physical, according to Multicast and Broadcast groups that are constructed by need-to-share needs. For Periodical (refreshing) Messages (PM) used for the SA and topology dissemination or control function, we show that message rate is almost linearly growing with the number M of channels allocated, as long as the easy condition M/N <<1 is met; (N being the total number of nodes in all channels). Furthermore, we show that MCR for PMs almost achieves the Shannon bound for a single 1-Channel UWB TDMA; (however, a UWB-TDMA is inappropriate for long range communication as it requires a long guard-time which consumes most of the short packet time, and a physically non-achievable high peak power). MCR MANET also readily facilitates low-delay, "Combat" Voice and high throughput sensor data (Video or Radar), where few sensors are disseminating their data to a wide area. While a node participates in the wide area PM MANET over several RF channels, in some other channels it continuously receives several high data rate sensors without conflicts. Other advantages of an MCR SDR are - 1) FH ECCM - only the transmitter has to hop. 2) Each SDR is an instantaneous WB Spectrum Analyzer, making it "Cognitive Ready". Summarizing, the combination of ultra-WB digitization and ultra-fast simultaneous processing of whole RF bands with 2 dimensional F/TDMA MAC algorithms - allows MCR SDRs to approach the Ideal "True SDR" vision with maximum flexibility for military tactical MANETs, and a 10 to 100fold times increase in reception throughput.
The U.S. Military's Joint Tactical Radio System: Now Deployed.What Lessons Were Learned? What Future Lies Ahead?
Sherin Kamal (Science Applications International Corp.(SAIC), USA)
Now that several products from the JTRS program are in the field, this paper examines valuable technology & programmatic lessons learned. The multi-billion dollar acquisition program remains the largest effort to deploy software-definable radios in a military tactical environment. What have we learned about Mobile Adhoc Networks (MANETs), software portability and SDR device designs that can benefit the SDR community? How do these lessons apply to the current interest in cognitive radios, dynamic spectrum management etc.? The paper also provides an update of where the JTRS program is today, and how it has been restructured to accelerate the participation of industry in its evolution.
Multiple Layered Method of Terminal Slot Contention Resolution for the Integrated Waveform (DAMA UHF SATCOM)
Richard Booton (Harris, USA)
The Integrated Waveform, specified in MIL-STD-188-181C/182B/183B/185A, defines a TDMA communication system in an attempt to improve satellite bandwidth utilization over conventional SATCOM waveforms. To overcome some of the limitations of statically defined user communications (UCOM) services in MIL-STD-188-183A, the flexibility to assign services nearly anywhere within a frame was introduced in MIL-STD-188-183B. Although this feature has the ability to greatly improve satellite bandwidth utilization, the enhanced flexibility also has a tendency to complicate the issue of slot contention. Consequently, one technique utilized by the IW Network Management System, to mitigate the increase in slot contention, is to allow to allocation of numerous Uplink and Downlink support services in order to accommodate the diverse array of UCOM service placements. Unfortunately, this technique largely transfers the burden of detecting and resolving slot contention, between one or more desired UCOM services, and the services essential to maintaining Uplink and Downlink acquisition, onto the terminal systems. This paper will discuss a method for detecting terminal slot contention, within an IW communications system, by employing a multilayered strategy in order to avoid, or at least minimize, disruption of ongoing user communications with a desired UCOM service while maintaining both Downlink and Uplink acquisition.
Hardware-Accelerated Design Space Exploration Framework for Communication Systems
Markus Kock (Leibniz Universität Hannover, Germany); Sebastian Hesselbarth (Leibniz Universität Hannover, Germany); Holger Blume (Leibniz Universitaet Hannover, Germany)
We present an FPGA-based hybrid hardware-in-the-loop design space exploration (DSE) framework combining high-level tools (e.g. Matlab/Simulink) and highly optimized hardware implementation. This enables derivation of comprehensive cost models using Monte-Carlo methods and quick development and optimization of signal processing hardware blocks. The achievable simulation speedup is a key enabling the characterization and optimization of complex communication systems using Monte-Carlo approaches which are infeasible for pure software simulation due to the large required stimuli sets. The framework supports a divide-and-conquer approach through a flexible partitioning of complex algorithms across the system resources on different layers of abstraction. This facilitates efficiently splitting the design process to different teams. The framework comprises a generic System-on-Chip infrastructure template, module wrappers, the Matlab-to- FPGA communication layer and design space navigation algorithms. The hardware template can be synthesized for a variety of emulator-like FPGA platforms. Results of a DSE for interference alignment algorithms are given as a case study.
Implementation of multi-channel IEEE 802.15.4 PHY with USRP N210 and an external FPGA
Jeong-O Jeong (Virginia Tech, USA)
Implementation of a hybrid FPGA and GPP-based SDR application will be explored using a polyphase filter bank channelizer and IEEE 802.15.4 as a test case. Initially, the target FPGA device is Xilinx Spartan XC3SD3400A on USRP N210 from Ettus. Demodulation, despreading, and symbol correlations are performed on the FPGA, and the resulting data is sent to GNURadio blocks on the host for further MAC layer processing. As a more complex test case, a multi-channel IEEE 802.15.4 receiver will be implemented on the XUPV5-LX110T development board with USRP N210 as an RF front end. The polyphase filter bank channelizer divides a 20 MHz spectrum into four channels. An energy detector will detect which channel is being occupied, and the receiver will demodulate the signal on the occupied channel. To incorporate an external FPGA in the system, the firmware of USRP N210 is modified to send data to the external FPGA board instead of the host over Ethernet. The external FPGA on XUPV5 is programmed to receive the data from USRP N210, process it, and send the processed data to the host. The performance of the FPGA implementation will be compared with those of the GNU Radio IEEE 802.15.4 blocks developed at UCLA. Interoperability of the FPGA implementation will also be tested with commercially available ZigBee nodes and the GNU Radio implementation. To date, a working IEEE 802.15.4 receiver and transmitter have been developed and tested on the FPGA of USRP N210. The USRP N210 has been successfully re-programmed to send data to an external FPGA instead of the host PC. This paper will illustrate the process of modifying the USRPN210's firmware and FPGA to communicate with an external FPGA and highlight the advantages of FPGA-based SDR applications. It will also compare the performance of SDR implementations of IEEE 802.15.4 on different platforms. Researchers and developers looking to incorporate custom FPGA code into the USRPs or incorporate an external FPGA board with USRP as an RF front-end may find this paper to be a useful example.
Experimental Study on Interference with Cognitive Radio using a Testbed
Venkat vinod Patcha (Qualcomm Inc, USA); Shuangqing Wei (Louisiana State University, USA); Rajgopal Kannan (Louisiana State University, USA)
Cognitive Radio is an emerging technology that enables for efficient utilization of the spectrum. As such, it has created great interests in industrial and research fields. Many people have proposed test-bed models to demonstrate the co-existence of primary and secondary users in a realtime noise environment. However, they assume the perfect timeslot synchronization and neglect the performance metrics that affects the interference of primary and secondary users. This paper provides an experimental test-bed in the presence of asynchronous mode for PU and SU, while providing an empirical solution for variations in throughput of primary and secondary users with the change of secondary user parameters (sensing frequency and transmission time).
Techniques for GHz Bandwidth RF/IF Signal Recording
Rodger Hosking (Pentek, USA)
For the latest high-speed A/D converters operating in the Gigahertz range and beyond, real-time signal recording for software radio applications has become a challenging feat that requires specialized hardware and intelligent application software. This paper will discuss how to build a real-time recorder capable of streaming sustained data to disk at rates of 3 GB/sec and higher. System developer's challenges will be outlined with considerations for software radio applications. These challenges include the ability to overcome the limitations presented by the recorder's I/O interfaces, memory, operating and file system as well as optimal use of disk drive technology, RAID controller technology and control tools for data capture and analysis.
Evaluation of Computing Resource Management Methods for SDR Clouds
Vuk Marojevic (Polytechnic University of Catalonia, Spain)
SDR clouds describe distributed antenna systems that connect to a date center. The data center performs the digital signal processing tasks (waveforms) of base station transceivers. A single SDR cloud data center may cover a metropolitan area with millions of inhabitants. Thousands of processors then serve thousands of users in parallel. Each processor consists of several processing cores. This very large-scale computing system needs to process waveforms on demand. Each new user session request implies allocating resources of the data center resource pool for executing the waveform while other waveforms' processes are already running. A session termination correspondingly frees resources. Hence, computing resources are dynamically occupied and released. The tight timing constraints of wireless communications require developing efficient computing resource management approaches for the dynamic resource provisioning. Different approaches exist. This paper reviews two resource management concepts— dynamic global scheduling and mapping + non-preemptive static scheduling—and analyzes the pros and cons of these.
Global scheduling is the most commonly employed scheme for running general purpose applications on multi-core processors. The literature on this topic is vast, covering many different scheduling types: preemptive or non-preemptive, fixed or dynamic priorities, etc. Some algorithms support (hard or soft) real-time applications. . The common characteristic is the fact that the scheduler runs periodically. The processes to be executed arrive to a common queue and the scheduler decides which process is executed on which processor. The scheduling overhead is given by the scheduling periodicity and the scheduler execution time (per invocation). Although not designed for signal processing applications, this family of schedulers is employed in many modern modems (multi-core mobile phones and base stations). IBM's Wireless Network Cloud (WNC) proposal for centralized baseband processing uses the dynamic global scheduling. The processing workload is divided into several threads, each processing a set of OFDM symbol blocks. The global scheduler dynamically distributes the threads among the cores. This way waveforms are allocated to multi-core CELL processors (running Linux with real-time kernel extensions) as long as the real-time scheduling is feasible (admission control).
An alternative approach is using a global mapper that distributed the waveform modules among the cores. The scheduling can then be done locally, once at session start (static scheduling). Processes are non-preemptive. More precisely, whenever a new user initiates a wireless communications session, the corresponding waveform is mapped to the available computing resources followed by processor-internal scheduling. This approach is based on a pipelined execution on time slot granularity. A time slot is a time frame that is typically specified as a fraction of a microsecond for ensuring low processing latencies. It simplifies the scheduling and synchronization processes. Since the mapper and scheduler are executed once for each new user arrival, the overhead becomes a function of the user arrival rate and the mapping and scheduler execution times.
This paper provides a theoretical and practical analysis that assesses the suitability of the above methods for managing the computing resources of SDR clouds. We will compare the overheads and the success ratios of the two methods in medium and highly loaded scenarios. The overhead will be measured using appropriate metrics, such as execution time or percentage of CPU for resource allocation purposes. Simulation results will demonstrate the suitability of our mapping + local scheduling proposal because of its simplicity while being specifically designed for the characteristics and needs of waveforms executing in a distributed and shared computing environment.
Why SDR Isn't Enough: Going beyond SDR to SDS
Manuel Uhm (Coherent Logix, USA)
Software defined radio (SDR) has become the dominant technology for radios deployed for military communications, satellite communications, public safety communications, commercial wireless infrastructure and even mobile handsets. This has come about for many reasons, including the need for multi-mode support, the flexibility to adapt to ever evolving air interface protocols even after deployment, and the development cost savings and time-to-market benefit from software code reuse. So, given this level of success, what does the future hold for SDR?
In fact, SDR was just the beginning for SDS, or software defined systems. Increasingly, systems like handsets and even mobile infrastructure need to be much more than a radio. Handsets need the computational performance to not only do multimode radios, but also tasks such as video coding, computational imaging, graphics acceleration, analytics, etc. For infrastructure with a longer lifetime, future-proofing is an important characteristic, but in addition, there is value in putting data content from the cloud next to the radio access network, which necessitates storage and video processing, as well as radio processing.
In order to make SDS a reality, however, a new architecture is required to support a processing paradigm that extends beyond multi-mode to multi-application, such as radios, cameras, gaming, etc. Therefore, this architecture has to have the performance to support computationally intensive standards such as LTE-Advanced or H.265, as well as tasks that may not even be fully known at deployment, at very low power. Architectural options for software defined systems will be explored.
Comparing LTE Channelizers Implemented with Linear Phase Recursive Filters and FIR Filters
frederic j harris (San Diego State Univ, USA); Chris Dick (Xilinx, USA); Elettra Venosa (San Diego State University, USA); Xiaofei Chen (San Diego State University, USA)
Cell sites repeaters may receive a composite signal containing a mix of LTE channels with bandwidths of 5, 10, 15, and 20 MHz and be required to rearrange the frequency plan of the channels or to drop and insert specific channels prior to transmitting the altered composite signal. The straight forward approach to this task is to down-convert, and down-sample each channel in the mix and then up-sample and up-convert and merge the new traffic mix. The filters applied to the up and down conversion task as well as the up and down sampling task would likely be linear phase FIR filters because of the ease with which the resampling task can be embedded in the filtering task. We present an alternate filter structure formed from linear phase recursive filters and compare their performance and computational complexity with their FIR filter counterparts. We will show that the recursive filter version of the channel extractor requires significantly few arithmetic operations and actually outperforms the non-recursive version as demonstrated by the error vector magnitude (EVM) of the two options.
GReasy is an enhanced GNU Radio flow that seamlessly augments the standard GNU Radio framework with modules that reside in FPGAs while preserving GNU Radio dynamics. By delegating portions of a GNU Radio flow graph to networked FPGAs, a larger class of software-defined radios can be implemented. Assembly of the signal processing structures within the FPGAs is accomplished using an enhanced flow where modules are customized, placed, and routed in a fraction of the time required by the vendor tools. With rapid FPGA assembly, a GNU Radio designer retains the ability to perform "what-if" experiments, which in turn enhances productivity.
Fast, Accurate, Repeatable SCA Compliance Testing with R-Check SCA
R-Check SCA is a compliance testing tool in use by, and developed in partnership with, the Joint Tactical Networking Center (JTNC) Test & Evaluation Lab (JTEL). R-Check SCA uses static source code analysis to check requirements contained in the SCA 2.2.2 specification. R-Check SCA uses a compiler-grade static analysis engine combined with off-the-shelf tools and data formats to test SCA-specific requirements that cut across C/C++ source code, CORBA IDL, and SCA XML descriptor files and generate concise, reproducible incident reports. A graphical user interface makes it simple to construct, run, and manage whole suites of tests, while equivalent command-line tools make it possible to script runs. R-Check SCA is also available as a plug-in to CRC's SCA Architect 2.0 to provide continuous project coverage as business logic is added to automatically generated code. This demonstration will include an overview of the power and versatility of R-Check SCA with an emphasis on our newest features, including the GUI, integration with SCA Architect 2.0, and expanded support for both SCA XML testing and memory allocation/deallocation reporting. JTEL has verified the correctness of R-Check SCA for several requirements and adopted it as part of their process of record for SCA compliance testing. JTEL has reported that using R-Check SCA has reduced the time to test certain SCA requirements by up to 90%.
The key design issues of WLAN baseband system are satisfying the latency requirement and seamlessly integrating multiple signal processing blocks including front-end, baseband processors, and channel decoders. In particular, meeting the latency requirement for the giga-bit WLAN is challenging when DSP based implementation is considered. In this demonstration, we have developed a baseband receiver using in-house DSP cores that verified in a SystemC based platform simulator as well as a FPGA prototype. The DSP core consists of 3 vector function units with 512-bit SIMD instructions, and is assumed to run at 1GHz clock speed. The latest WLAN standard of IEEE 802.11ac has been implemented and tested for the mode of 4 streams with 64QAM, 3/4 code rate, and 80MHz bandwidth. A Zero-forcing based 4x4 MIMO equalization and detector has been implemented on the DSP to demonstrate the feasibility of the baseband receiver in the platform. The ARM based SoC platform includes a single in-house DSP core with additional application specific processors for digital front-end processing and Viterbi channel decoding. The SystemC model for the processing cores has been developed and integrated in the Platform Architect (PA) design tool environment. The cycle accurate simulation for the 1Gbps scenario is demonstrated with the graphical interactive view between components. The simulation demonstrates the text data transfer at 1.3Kbps. A hardware prototype is implemented on Virtex-6 based FPGA board. Due to the speed limit of the FPGA, the prototype operates at 1/50 scaled clock frequency of 20MHz, which enables the FPGA prototype to demonstrate 20Mbps real-time video transfer. Though the prototype cannot confirm the 1Gbps real-time data transfer over the air, the platform simulator is useful to verify the in-house DSP cores, and the FPGA prototype can be used as the reference testbed for developing giga-bit WLAN algorithms and systems.
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