The objectives of the End-to-End Reconfigurability (E²R) research project are to bring the full benefits of the valuable diversity within the radio eco-space, composed of a wide range of systems (such as cellular, wireless local area and broadcast), and to devise, develop and trial architectural design of reconfigurable devices and supporting system functions to offer an expanded set of operational choices to the different actors of the value chain in the context of heterogeneous mobile radio systems. The E2R project will help operators to better exploit their investments on infrastructures and terminals and ensure that the infrastructure will be flexible and reconfigurable to accommodate evolving standards, applications and the end- user needs. E2R is seen by many actors of the wireless industry as a core technology to enable the full potential of beyond 3G systems. It has the potential to revolutionize wireless just as the PC revolutionized computing. This paper presents the E2R research project, its architectural framework, as well as the key achievements in the different technical areas in 2004-05.
The End-to-End Reconfigurability (E 2 R) project aims at realising the full benefits of the diversity within the radio eco-space, composed of wide range of systems such as cellular, fixed, wireless local area and broadcast. The key objective of the E 2 R project is to devise, develop, trial and showcase architectural design of reconfigurable devices and supporting system functions to offer an extensive set of operational choices to the users, application and service providers, operators, and regulators in the context of heterogeneous systems. Building on the successful developments of the first phase, E 2 R II will demonstrate and validate technologies that enable a true seamless experience based on reconfigurable heterogeneous systems. The project will pursue research into the most promising directions towards removing walls (current technical and regulatory limitations) and building bridges (technical) in order to facilitate the vision of true end-to-end connectivity. This paper presents the E 2 R II research project ambitions as well as each of the technical areas that will be tackled.
This paper discusses the mechanism developed in E 2 R [1] to reconfigure hardware and software to implement a low power wireless system while maintaining the robust and reliable operation expected from telecommunication equipment. From the perspective of reducing power consumption the key signal processing elements (e.g. FFT, rake fingers) should be implemented in the most power efficient approach possible.
This paper deals with partial reconfiguration issues on heterogeneous prototyping platforms (DSP/FPGA). An analysis of multi-standard physical layer applications in terms of reconfiguration needs permits to extract several use cases of reconfiguration in a multi-standard handset: standard switching, mode switching, bug fixing, etc. The main difference between these schemes of reconfiguration is the level of granularity of the reconfiguration.
Selecting the best choice of processing resources is a problem faced in the course of developing any software radio or multi-waveform platform. This problem can be viewed as one of identifying the optimal design, typically with r eference to some function of cost, power, and area, from the set of feasible processing solutions. Fortunately, optimization theory provides the designer with numerous tools and algorithms that can be used to quickly search even the largest solution space. However, before applying these optimization algorithms, the feasible solution space must be identified-an onerous process in light of the large number of μ Ps, DSPs, and FPGAs available for use and the even larger number of ways that these resources can be combined together. This paper presents a methodology for estimating the elements of a multiple-processor multiple-waveform feasible solution space.
One central challenge in the realization of Software De- fined Radio (SDR) is to provide a programmable solution that meets the challenging high-performance, low-power requirements, while providing an efficient software development interface. In this paper, we present an overview of a fully programmable multi-core SIMD architecture for SDR. Our solution can support 2Mbps W-CDMA at about 270mW, and 24Mbps 802.11a at about 370mW in 90nm technology. This high computational efficiency is achieved by exploiting the vector characteristics of the algorithms, through a unique multi-core architecture that consists of tightly coupled scalar and wide SIMD pipelines. In addition, we present a software design flow that supports efficient DSP programming and implementation through a set of signal processing extensions to C, referred to as SPEX.
Field Programmable Gate Arrays (FPGAs) are used to perform many tasks on a Software Defined Radio (SDR). To meet the performance and density needs of the newest SDR waveforms, FPGAs must be built using the latest silicon technology. The latest generation of 90nm FPGAs can meet the performance and density requirements, but power is a concern. In order to minimize the overall system power the impact the three types of power consumption (static, dynamic, and interface) needed to be evaluated. Static power consumption has become a leading factor when designing SDR systems. This paper will explore tradeoffs in system partitioning that result in the lowest overall power consumption. Areas to be evaluated include FPGA design techniques; FPGA and processor partitioning; interface standards; and multiple FPGA partitioning.
HYPRES superconducting integrated circuits are able to sample input signals and process the data at clock speeds as high as 40GHz at the current (1500nm) fabrication node. This enables new hardware and software architectures in wireless communication systems. The following possibilities are considered in this paper.
Radio data communications systems transmit information over-the-air, a process which inherently connects two nodes with potentially different concepts of the passage of time. Although these “time rate” differences may be small, data is transmitted from one node at a slightly different rate than the target node is prepared to receive it. In some systems (e.g. packet based systems and asynchronous systems), well known flow-control solutions can be employed to alleviate this mismatch. However, synchronous data systems, which are especially prevalent in military radio systems, provide special challenges to radio system designers. These systems must flow data at a precise, constant rate with no recourse to flow control mechanisms. In these systems, the process of recovering and synchronizing the clocks of communicating nodes is commonly referred to as the “clock correction problem”. Properly addressing this aspect of system design forms a key part of successful, efficient and reliable radio communications systems in a data network.
Software-defined radio (SDR) has already adopted many commercial off-the-shelf (COTS) technologies from computer systems that lower the cost of flexible data acquisition and signal processing hardware and software. One useful technology that has not heretofore been used in SDR systems is signal compression. Compression has not been used in SDR systems for two primary reasons. First, SDR sampling rates are prohibitively high, limiting SDR compression algorithms to those that can cost-effectively be implemented in hardware. Second, SDR signals have varying bandwidths, center frequencies, and dynamic ranges, presenting a challenging set of conditions for any compression algorithm. This paper describes the SignalZIP™ lossless and Samplify™ lossy compression algorithms that compress bandlimited samples acquired by A/D converters, or provided to D/A converters, for SDR use. Samplify compression products, available both as evaluation software and as netlists for Altera and Xilinx FPGAs, allow SDR users to send 2x to 6x more data across existing busses (PCI, cPCI, VME, etc.) and networks (Ethernet, USB, FireWire, etc.)
The standard design procedure for the M-path polyphase filter partitions the impulse response of a prototype low pass FIR filter. The resulting M-path filter, the core of multirate rate filters and filter banks, exhibit the desirable attributes of periodically time varying filters. These attributes being, reduced computational burden for a given filtering task, and simultaneous access to multiple Nyquist zones. While we can not similarly partition the impulse response of a conventional IIR filter, we can design recursive filters as a sum of sub filters with transfer functions of the form Hn(ZM) thus embedding the desired M-path partition in the design process. In addition to the M-to-1 workload reduction obtained from an M-path polyphase filter, the M-path IIR filter offers an additional 4-to-1 to 10-to-1 reduction relative to the comparable M-path FIR filter. Such filters are described in a number of text books but till recently design algorithms were not available to compute the coefficients required to satisfy a wide range of filter specifications. In this paper we describe the organization of these alternate filter structures, illustrate the result obtained from MATLAB based design routines, and compare the performance and workloads of the M-path recursive and non-recursive filter systems.
The analysis of spectrumoccupancy measurements in a broad range of frequencies [1] has showed that design of direct downconversion receivers providing conversion from RF to baseband poses a challenge. This challenge stems from maintaining linearity in receivers in light of potentially unpredictable levels of interference. While inband interference is generally considered in the evaluating the performance of conventional receivers, wideband receivers must also take into account the effects of outband interference. Yet the development of wideband front end receivers is a key to achieving frequency agility and realizing the ultimate goal of ideal software definable radio (SDR) receivers. This paper considers design requirements to minimize the impact of multiple narrowband interferers and compares strategies to combat the strong interferer problem.
Making use of multiple communication services is desired at mobile terminals for various applications. Software Defined Radio (SDR) technology is the focus of much attention to realize such terminals [1], [2]. Multi-band and multi-signal receivers are inve stigated to realize such terminals. Undersampling is a potential method for simultaneous receiving of multi-band and multiple signals by selecting suitable sampling frequency. However, the sampling frequency becomes higher when receiving the signal of a communication system that occupies a wide bandwidth. This paper presents a novel sampling frequency selection scheme that enables selection of a lower sampling frequency by receiving at least the desired transmission channels in the wireless system signals.
A software defined radio (SDR) terminal promotes programmable realizations of the physical layer functionalities. A lot of resear ch work has been done in applying digital signal processors (DSP) and field programmable gate arrays (FPGA) to implement the baseband functionalities of the physical layer. In this paper, the programmable solutions are extended to the radio frequency (RF) band for the transmitter. Digital pulse width modulation (PWM) technique is used to generate binary signals at radio frequency. A QAM modulator, combined with PWM, is implemented using off the shelf FPGA. The output of this all digital transmitter has a center frequency of 800 MHz.
Third generation (3G) cellular standards has seen many changes in the design specifications during its evolution. There also exist multiple standards, CDMA2000 and WCDMA, which have different specifications for implementing the digital baseband (DBB) system. Changes in a standard during the development of system- on-a-chip (SoC) can be difficult to accommodate or can make the system less efficient when incorporated at the end of the SoC design cycle. The concept of software radios has gained widespread acceptance in basestations using reconfigurable hardware. However reconfigurable hardware designs for mobile handsets still remain a challenge. In this paper we present a design methodology to develop reconfigurable modem (RM) architecture for CDMA based 3G handsets. Performance comparison between ASIC, RM and DSP implementation of rake receiver processing is presented to demonstrate the relative advantages and disadvantages.
Making use of multiple communication services is desired at mobile terminals for various applications. Software Defined Radio (SDR) technology is the focus of much attention to realize such terminals [1], [2]. Multi-band and multi-signal receivers are investigated to realize such terminals. Undersampling is a potential method for simultaneous receiving of multi-band and multiple signals by selecting suitable sampling frequency. However, the sampling frequency becomes higher when receiving the signal of a communication system that occupies a wide bandwidth. This paper presents a novel sampling frequency selection scheme that enables selection of a lower sampling frequency by receiving at least the desired transmission channels in the wireless system signals.
The 802.16 WiMAX specifications contain a rich set of options addressing increasing bandwidth requirements for “last mile” digital communications applications. This wireless building block, however, is a fast-moving target that cannot be adequately implemented using fixed architectures such as FPGAs and ASSPs. This paper will demonstrate how 802.16 can be cost-effectively implemented using software-configurable processors which merge hardware and software development in a single design methodology based on C and using extension instructions to hardware-accelerate high-speed signal processing tasks, such as FFT and Viterbi decoding. By abstracting hardware as software, software-configurable processors achieve the same throughput as FPGA and high-end DSP-based architectures while extending overall programmability and flexibility to enable developers to support evolving standards in a timely fashion.
This paper presents two new power conversion circuits developed for future SDR application systems. The first power conditioning circuit is a contactless battery charger that employs a pair of separate printed circuit board (PCB) windings as a contactless energy transfer device. The second circuit is an ultra low-profile dc-to-dc converter that utilizes a pair of PCB windings (printed on opposite sides of a double-sided PCB) as a coreless transformer. By using PCB windings an energy transfer device, the proposed power conditioning circuits readily implement a low-profile design, which is critically needed for SDR application systems.
Future wireless communication systems must support multiple radio standards and be capable of executing them concurrently. Consequently, flexibility and programmability will be two of the most important features. However, even a flexible solution has to fulfill the traditional constraints on silicon area and power dissipation. In this paper we address the problem of designing a cost-efficient radio solution start- ing from the application level. We describe a methodology that drives the design in five phases from application to implementation. We apply this approach in the design of our solution for software-defined radio (SDR) terminals. Here, an optimum partitioning between all components of a multi-standard transceiver system has to be found. The outcome is a heterogeneous platform with a multi-standard baseband circuit and multiple front-ends. The baseband circuit consists of multiple DSP cores and dedicated accelerators and is fully software-programmable.
In Software Defined Radios FPGAs can be used as both an interconnect layer and a general-purpose computational fabric implem enting hardware acceleration units. Typical implementations of software defined radio (SDR) modems include a general purpose processor (GPP), digital signal processor (DSP) and field programmable gate array (FPGA). The FPGA fabric can be used to offload either the GPP or DSP (or both). Hardware acceleration units in conjunction with small embedded microprocessors can be used as coprocessors to the GPP or DSP, accelerating critical sections of either DSP or GPP code in hardware. Moreover, with general purpose routing resources available in the FPGA, hardware acceleration units can run in parallel to further enhance the total computational output of the system. The algorithms and systems can be modeled in high-level languages or tools such as C or Matlab/Simulink and easily ported to hardware acceleration units running on the FPGA. The creation and use of hardware acceleration units and their performance over software implementations will be discussed in this paper.
In this paper we present Morpho Technologies’ reconfigurable DSP platform for handling key baseband processing for mobile handheld devices that intend to feature multimode communications capabilities. PHY layer signal processing functions that were previously implemented in dedicated hardware blocks are now capable of running completely in software, in keeping with the philosophy of Software Defined Radio. First, we present an overview of Mopho’s MS2 reconfigurable DSP architecture. The MS2 is a highly optimized and efficient parallel processing engine for meeting the real-time requirements of mobile baseband processing at very competitive power consumption levels. Next, we contrast the MS2 to FPGAs and traditional DSPs used in current SDR implementations. Lastly, we describe the detailed implementations of some of the most computationally intensive kernels that constitu te the critical components of OFDM and GPS. The flexibility of our technology empowers SoC designers to not only meet the current multimode PHY layer requirements, but to create a platform that can accommodate future changes within these standards.
The design flow and methodology for hardware centric radio baseband processors is well established and understood. However, migration to a software centric baseband processor approach is still new to many designers. The paradigm shift of viewing real time events from the point of view of gates and registers to pointers and memory offsets is not often easily grasped. This paper covers a new design flow appropriate for a complete software driven baseband processor using the Sandblaster™ SDR baseband processor. Topics covered in this paper include programming for the RF-Baseband Interface, Programming the entire physical layer processing in C, handling TDMA/CDMA time-critical events, Code/Data memory considerations and layout, Multi-program support for multi-mode radios, System Software Pseudo-code, Terminal Reconfiguration Management, and Taking advantage of Low Power Architectural features.
The purpose of this paper is to compare competing techniques for wideband channelisation, and to assess the flexibility of each of these methods in the context of a software defined radio (SDR) receiver. Distinction is drawn between architectures where all channels are equally spaced and of equal bandwidth, and those architectures which afford greater flexibility. Consideration is also given to the practicalities of channeliser reconfiguration, and the ability for channels to operate independently of one another. Particular emphasis is given to analyzing those architectures that are capable of dealing with wide input bandwidths (hundreds of MHz or more) and large numbers of channels.
We describe an OFDM based high data rate signals in space (SiS), designed specifically for use in military applications. This means that the system is optimized for operating units with long multi-path delays and relatively high speeds. The aim of such a SiS is to enable high data rate transmissions, in the order of tens of Mbps within the framework of an internet protocol (IP) based mobile ad-hoc network (MANET).
This paper presents a performance analysis of a novel searcher designed for array antenna in terms of average acquisition time as well as detection and false alarm probability. It has been shown that proposed searcher significantly reduces the acquisition time compared to the conventional searcher, which does not exploit the merit of array antenna structure. Due to the shortened acquisition time, which is provided by the phase diversity, the smart antenna system utilizing the phase diversity can enhance the demodulation performance, which consequently improves the system capacity, service area, and entire throughput.
In traditional hardware implementations of the CDMA standard IS-95 [1], signals received at the base station are despread at a rate of 1.2288 Megachips/sec prior to Walsh decoding. However, in a software implementation where low computational complexity is critical, despreading at such a high rate imposes a strain on computational resources. In this paper, we take advantage of the flexibility af forded by software implementations and develop three classes of Walsh decoding algorithms that do not require full despreading of incoming signals at the base station. Two proposed classes of algorithms exploit the fact that Walsh codes are locally decodable codes, which have the surprising property that any bit of the message can be recovered (with some probability) by examining only a small number of symbols of the codeword. We also describe a third class of algorithms based on code puncturing. All these algorithms enable trading off computation for performance or, from another perspective, they enable the system to dynamically adapt the computational requirements of the despreader and subsequent Walsh decoder to changing channel conditions such that a target bit-error rate (BER) is maintained. These algorithms are applicable to other CDMA-based systems that use Walsh codes for orthogonal modulation, and the third class is also applicable to CDMA-based systems such as UMTS (3G WCDMA) that use codes for channelization.
A Nyquist filter can have any odd symmetric taper as a transition between its pass band and stop band. The most well known taper is the raised cosine (RC) taper specified in most communication standards. The square root (SR- RC) Nyquist filter formed from this prototype exhibits high spectral side lobe levels that fail to meet severe spectral mask requirements. This paper presents a SR Nyquist filter with an alternate taper that, for the same length filter, achieves side lobe levels between one and two orders of magnitude below those obtained from a cosine tapered square root filter. This alternate filter also offers up to an order of magnitude reduction in residual ISI levels.
The objective of this paper is to provide the APIs of a Smart Antenna Base Station(SABS) operating in SDR network in such a way that the APIs(Application Program Interface) are suitable for the entire system to maintain the openness, object-oriented design, and software controllability. The software and hardware of SABS is first modularized and partitioned into small modules, respectively. Then, the interface among the modules are specified for determining the SA API properly for the SDR network. The suitability of the proposed APIs is verified through a design example of SABS implemented in accordance with the proposed APIs. The performance of the proposed system is shown in practical signal environments of CDMA2000 1X with commercial handsets operating in various data rate ranging from 9.6 kbps to 153.6 kbps in terms of FER (Frame Error Rate) and SINR (Signal to Interference plus Noise Ratio) which is drastically enhanced through the nicely shaped beam pattern.
Gain and Phase mismatch of the analog quadrature mixers in a modulator or demodulator is the cause of an undesired coupling of positive and negative frequency components of an up or down converted signal. This coupling is an interference that affects the detection performance of a communication system. It is necessary to suppress the mismatch in receivers that process signals spanning a wide range of signal levels as might be found when extracting one or more channels in multi-channel filter banks. This interference is removed by an adaptive process that cancels the cross coupled projections from the host signals.
Multiple Input, Multiple Output (MIMO) technology offers the potential for a significant increase in capacity and performance within a given bandwidth and power budget. However, these benefits must be weighed against the cost of the multiple RF front ends and additional processing necessary in supporting MIMO systems. The creation of a cost effective MIMO system can be facilitated through the use of software defined radio technology. This technology allows systems to be fielded today supporting contemporary waveforms/air interface standards, with MIMO technology added as a future upgrade as the technology matures. A key enabling technology in supporting MIMO in the proposed SDR architecture is the use of a switched-fabric interconnect, such as RapidIO. RapidIO can be utilized to support the dedicate processing model inherent in traditional transceiver designs, and allows the amalgamation of received signals from each antenna into common space-time processing elements for future MIMO applications.
MIMO technologies with OFDM air interface lead to a very compelling high-speed data transmission for future wireless systems. Since performance verification of MIMO system is important, Software Based Radio(SDR) -based MIMO testbed becomes essential to validate the theoretical performance gain. In this paper, we present SDR-based MIMO testbed system developed in the framework of SK Telecom. The frame work is based on IEEE standard of 802.16e adopting MIMO-OFDM. To evaluate the performance, MIMO system verification software tool is also developed and used for off-line performance evaluation. The proposed SDR-based MIMO testbed and verification software tool can be used as efficient tool for channel modeling, capacity of closed- loop MIMO capacity verification and etc. The performance of the system is verified by using data generated via METRA channel simulator.
In wireless communications, accurate and tractable channel modeling is critical to evaluating the performance of the system. In this paper, we propose a new multiple- input multiple-output (M IMO) channel modeling technique for link level simulations. By utilizing wave superposition method, we propose a time varying MIMO channel in which the motion of antenna array can be characterized. With proposed channel model, we show that realistic propagation MIMO channel can be modeled and the spatial and temporal spread of MIMO channels are well modeled as well. Since the proposed model is applicable to any array geometry, the model can be applied to system simulations for MIMO as well as other adaptive antenna applications. For model verification, we present computer simulation result.
Software defined radio capitalizes on the notion that a single radio front-end supports many channels of receive/transmit. A software radio thus has a one-to-many mapping between a radio front-end and waveforms running in software. This architect ure is a significant departure from the current software radio state-of-the-art and one that comes with new challenges and design protocols. Current software radios able to support “n” simultaneous channels include “n” modems, “n” digitizers and “n” RF front ends. Some implementations even have “n” black-side general purpose processors. This paper explores software radio in its consummate form; an oppor tunity to execute multiple independent channels on a single radio front end.
Portable software defined radio solutions for the consumer market will be based on mobile devices employing multiple programmable processing resources, as low power consumption needs to be maintained for an acceptable battery life. Therefore the designer needs to orchestrate the given system functions of the waveform efficiently onto the distributed processing resources. For the automation or at least a substantial machine support of that process an explicit and platform independent representation of parallelism is a prerequisite. This article is focusing on the basic concepts to model waveforms for parallel hardware systems not directly related to the software communication architecture (SCA) [1 ] . Nevertheless we discuss the implications for the SCA along with the changes we expect for the value chain .
One area of focus in Software Defined Radio (SDR) systems is smart antennas. This is due to their ability to provide enhanced communication capacity and minimize interference. The optimum least-squares solution of linear systems of equations is a key operation in state-of-the-art communications systems including smart antenna systems. These applications typically require very large amounts of processing which makes implementations in cost-effective, fixed-point hardware – in Field-Programmable Gate Arrays (FPGAs) or Application-Specific Integrated Circuits (ASICs) - the preferred implementation choice.
This paper presents a signal modulation classifier design using artificial neural networks. We analyze system-level issues including carrier synchronization, bandwidth estimation, and modulation classification. This is an extension of previous work with the addition of standard free signal classification as well as an in-depth analysis of the feature space used in the neural network. The results show promising classification statistics with over 80% success rates in the presence of noise even with higher-order digital modulations.
Military communications applications such as the Joint tactical Radio System (JTRS) are increasingly turning to FPGAs for large portions of their system design. The reasons for this are many, but include the benefits of increased density, functionality, and performance of FPGAs, as well as higher flexibility, lower development costs and risks over ASICs. However, as FPGAs become a more integral part of the leading edge architectural design, replacing ASICs and ASSPs, security of the FPGA design and configuration bitstream is of utmost importance. This paper describes two techniques – configuration bitstream encryption and handshaking tokens – for securing designers’ intellectual property (IP) within SRAM-based FPGAs.
Our research analyzes security policy enforcement issues inherent to handheld Soft ware Defined Radio (SDR) devices. We have developed an abstraction for Dynamic Policy Enforcement (DPE) for a SDR system which consists of three distinct modules that monitor changes in external conditions, validate system configuration based on those conditions and a given policy, and implement changes to ensure policy compliance. In order to demonstrate the viability of our system, we created a prototype that implements the roles and responsibilities of our abstraction in conjunction with a prototype SDR system previously developed by NCSA that is based on the GNU SDR software.
SDR(Software Define Radio) will give future users a number of benefits like global roaming, multi mode, multi band, and multi standard. It will also offer complete programmability and reconfigurability to both multi mode and multi functional communication terminal and network nodes. Also, SDR is expected to solve th e compatibility problem among various mobile communication standards so that people can use the same device for different wireless network. If theses mobile communication environment is constructed, integrity and confidentiality of data and Terminal authentication become very important. Also, Mutually authentication and security formality problem are important for nodes. Therefore, In this paper propose authentication scenario and Transmission security for software download using PKC(Public Key Certificate) and AC(Attribute Certificate).
This paper addresses the problem of configuring mob ile devices over the air. A protocol is described that applies the concepts of trusted computing to allow a mobile host to demonstrate that it is secure, before any software is securely downloaded to it. This enables the source of the software to be given guarantees about the way the software will be handled by the recipient mobile host.
During SDR’04, we provided the results of a case study of the effect the download of a wave form with a weak security design, such as IEEE 802.11 Wireless Fidelity (WIFI), into a software defined radio (SDR). Wirelessly networked computers, interfacing with the Internet via WIFI, GSM, and other vulnerable waveforms, are becoming increasingly prevalent, and provide a useful case study highlighting the potential dangers posed by hackers to networks of software defined radios. Within the past year, our report on the threats posed by WIFI and SDR has had wide impact on the SDR security community.
A central issue for reconfiguration is authorization (or certification) of reconfiguration software, defining which software is accepted from whom. A well-known and widely used security mechanism to protect software download is signed content. The paper describes how standard digital signatures based e.g. on PKCS#1 or DSA signatures and X.509 certificates can be used for certification of radio software. Depending on how they are employed, different certification models can be realized (vertical market model, horizontal market model).
The Department of Defense’s (DoD) IP-based Global Information Grid (GIG) will encompass tactical mobile ad hoc networks (MANETs). Tactical MANETs will exist in the airborne, maritime and ground domains. These networks will utilize a black core infrastructure by using IPSec-based Virtual Private Networks (VPNs) to separate Communities of Interest (COIs) and classification levels.
The Joint Tactical Radio System (JTRS) Program is a key U.S. DoD transformational program with the purpose of supporting the U.S. DoD objective for information superiority on the battlefield. The JTRS Program is a driving force behind the advancement of U.S. Military Software Defined Radio (SDR) solutions and associated technology to meet today’s and tomorrow’s war-fighters’ needs. Military SDR solutions are evolving towards JTRS compliance including the maturation of the JTRS Software Communications Architecture (SCA) with defined Application Programmer’s Interfaces (APIs), the development and delivery of JTRS compliant waveform applications and the incorporation of key technologies, such as programmable security.
Developers of JTRS (Joint Tactical Radio System) platforms have been mandated to conform to SCA (Software Comm unication Architecture) specifications and undergo certification to ensure these requirements have been met.
MDA Corporation is the prime contract or for the Advanced Sat Com Terminal (AST) Technology Demonstration Project (TDP), a project being developed for, and in collaboration with Defence Research and Development Canada (DRDC). The AST TDP is focusing on demonstrating the potential of replacing legacy communications terminals with a reconfigurable terminal capable of supporting multiple satellite communication waveforms at data rates above 2 Mbps.
This paper is a summary of the design method used to implement an SCA-compliant waveform on specialized hardware. As a proof-of-concept, the 3GPP W-CDMA waveform was selected, where focus was placed on the PHY layer. The specifications are implemented following the “platform-independent model to platform-specific model” (or PIM-to-PSM) design flow guidelines and targeted to a GPP/DSP/FP GA development platform. The paper also contains a discussion on what must be done to make specialized hardware SCA-compliant on heterogeneous platforms (blend of CORBA- enabled and non-CORBA-enabled processors). Difficulties associated with FPGA SCA compliance are presented, and solutions for creating location- transparent components are described.
In the foreword of the Software Communications Architecture Specification, JTRS JPO states that “the SCA has been structured to build on evolving commercial frameworks and architectures.” [1]. Building a specification o n commercial standards enables the vendors to implement the required functionality using COTS products. Extended use of COTS in a system significantly reduces the acquisition, operation and supportability costs for the government. Following this principle, the SCA deliberately references commercial frameworks and standards such as minimumCORBA[2], Interoperable Naming Service[3], Event Service[4], Lightweight Log Service[5], POSIX[6], UML[7] and XML[8]. As the SCA specification evolves, more commercial stan dards can be adopted by the SCA. This paper describes commercial standards that can be candidates for adoption and investigates how existing implementations would be affected by them.
This paper describes the SDR on a CD system, a flexible Software Defined Radio (SDR) platform developed at Southwest Research Institute ® that is an ideal test-bed for prototyping waveform software and experimenting with waveform design, as well as for learning about the Software Communications Architecture (SCA). The system uses ordinary Personal Computers running Linux and the open- source SCA implementation from the Virginia Tech Mobile and Portable Radio Research Group (MPRG) called OSSIE to create a cheap and flexible platform for base-band processing. The system includes USB-based transmitter and receiver hardware m odules constructed from Commercial-Off-the-Shelf (COTS) components to implement the digital base-band to radio frequency interfaces. A bootable compact disk contains the complete waveform software. SDR on a CD was developed to help address two difficulties with developing SDR applications: 1) the steep learning curve for new engineers to become proficient in developing SCA waveform software and 2) the sizeable gap in environments and tools for transitioning between waveform functional simulations in tools such as SIMULINK ® and MATLAB ® and implementation on real radio platforms. The system has been used both for training, and for creating working radio prototypes.
The software communications architecture (SCA) is presently the only dominant unifying Software Defined Radio (SDR) standard. SCA commercialization is ongoing at the Object Management Group (OMG) in the form of a platform independent specification [5] for SDR communication devices. The SCA has taken a strong foothold in military circles. Though it has been argued many times that this standard may by itself not be the most appropriate one to utilize on potential private sector commercial applications and devices, it nonetheless possess formidable architectural benefits which cannot be ignored. The arguments against its use in small limited resource devices may no longer be an issue as cheaper, higher density, lower cost memory based mobile devices start to be produced. Couple this with the fact that OMG specification introduces the ability to implement the SCA using a non-CORBA based mapping and one finds that use of SCA style architectures in the commercial sector becomes a very real possibility. This paper serves to highlight some of the motivations behind potential adoption of SCA type architectures in reduced profile SDRs.
The U.S. DoD Joint Tactical Radio System (JTRS) Cluster 5 program 1 delivers power efficient, low-cost radio sets to be installed into 17 different host platforms ranging from high-performance Manpacks to disposable sensors. Aggressive cost targets are achieved through the use of a modular design resulting in a product line of radio modules that leverage open standards for maximum flexibility.
SDR technology has significantly matured and it becomes an increasingly important tool enabling the interlinking between, and the interoperation of, different wireless technologies. SDR technologies facilitate easy to use and they support adaptive communication platforms. However, the standard compliance and system’s correct functioning are generally the most critical problems and they need to be ensured. Addressing compliance and correct functionality, software and configuration verification and validation techniques are required. These techniques will need to be agreed and standardised to facilitate interoperability between different types of reconfigurable platforms and systems. This paper provides an overview of the influencing factors and shows some direction and examples of how such interoperability can be achieved.
System designers have historically wrestled with the determination of what portion of their logic is appropriate for each type of specialized pr ocessor. The typical approach is an educated guess or, worse yet, an unconscious repeat of the design pattern from a previous generation. Multiple tensions drive and constrain the assignment of application logic to each specialized pro cessor or GPP. To minimize deployment cost while achieving the required current and future functionality, system designers must balance the following factors:
Initial ramp up cost,
Period to amortize the initial research and development,
SDR synthesis using current generation middleware technologies warrants the use of optimum middleware and general software architectures. Key among these is the use of a domain centric yet canonical architecture such as SCA and the use of a open standards in its implementation. The OMG furnishes not only such open standards, but also provides meaningful guidance as to how to efficiently and effectively utilize those standards. One such OMG standard is the Extensible Transport Framework – viz. ETF. Software Defined Radio (SDR) application developers are increasingly exploiting the performance and power potential of different combinations of modern Digital Signal Processor (DSP) devices, FPGAs and general purpose processors (GPP). In an effort to minimize the mips consumption the use of efficient, componentized an re-usable interconnect software abstractions is paramount. Radio hardware implemented with heterogeneous s/w and h/w physical topologies with different permutations, combinations and numbers of such processing elements in them today provide further motivation for the use of such a transport interconnect standard. This paper talks about the practical experiences of implementing such a standards based transport interconnect abstraction in the context of specialized support for synthesizing SDR SCA radios with the aim of maximizing waveform portability.
This paper presents a framework for building re- configurable protocol stacks. A high degree of re- configurability is achieved through composing complex behavior of a communication system using Functional Units. A uniform interface allows these units to be connected to form a Functional Unit Network. The requirements and the resulting interfaces for such units are subject to this work.
Software Defined Radio (SDR) is an emerging technology with the objective of implementing the processing tasks required in a radio transceiver in software rather than in dedicated hardware. As a result, programmable devices such as Instruction Set Processors (ISPs) and reconfigurable logic devices, e.g. Field Programmable Gate Arrays (FPGAs), may be mixed for building a Reconfigurable Heterogeneous Hardware Platform. The peculiarities of communication systems and the fact that they must be implemented under SDR environments, where the main objective is to deal with the reconfiguration process, introduce a specific problematic in the development and management of such applications. In that context the presented work addresses the development of a suitable Middleware, defined as P-HAL (Platform & Hardware Abstraction Layer) that tries to advance in the process of defining a common framework to develop and deploy software radio applications by eliminating platform (hardware and support software) dependencies.
The mobile communication market is confronted with an increasing number of communication standards and a corresponding complexity for the mobile terminal applications. To cope with this complexity, the Software Defined Radio approach gains more and more attractiveness. The upcoming hardware platforms supporting a manifold of communication standards all have to compromise between the degree of supported flexibility and the required power consumption. These compromises cause a more complex programming interface, because parallelization potential, synchronization and latency time restrictions have to be evaluated in detail. The decoupling of the hardware platform from a specific application will also change the business models in the future, because software and hardware don’t have to be developed from the same company anymore. But to support this development, a new interface has to be defined to separate the required know how about the hardware platforms from the know how about the application specification. This paper will introduce one proposal and show development results.
This paper describes a case study examining two distinct design processes for implementation of FPGA-based software defined radio subsystems. We compare a traditional RTL design approach with a model-based design flow involving automatic code generation using System Generator. Both design processes were applied to the development of a common SATCOM waveform: Mil-Std- 188-165a. Results indicate a 10:1 improvement in development efficiency using System Generator, based on quantitative comparison of the time consumed in developing system simulations, algorithm documentation, code design and debugging, hardware implementation, and algorithm verification. The time savings associated with performance analysis using hardware co-simulation is also assessed.
Software Defined Radios are in a unique software domain within DRE systems. This domain includes tackling complexities introduced from a number of quarters, including concerns dealing with systems that are embedded, real-time, high performance, heterogeneous, platform-independent, portable, object-oriented, multi-threaded, distributed, component-based, programmable via both declarative and imperative programming mechanisms, and in many cases resource constrained. Needless to say, domains as complicated as this stand to gain from the recent advances in Model Driven Development, Generative Programming and Agile Programming techniques. Just as the domain is multi-faceted in nature so to need be the solutions, tools and techniques applied to them to ensure success.
The Software Communication Architecture (SCA) standard and associated documents have no standard graphical representation of most types of Domain Profile connections. Connections within applications are well represented (at least at an informal level). However, connections to services or between application components and logical devices in underlying platforms are not. This causes errors not only in communication between humans, but also in delivered XML descriptor files. There is a simple, natural, graphical notation for depicting these connections. Developers who write or generate XML from these diagrams can deliver better quality profiles faster.
A high-assurance software-based communication system is one in which there is a high consequence attached to system failure. In other words, a high-assurance software-based communication system is a safety-critical and/or security system for which failure is not an option.
The MDA concept was first introduced within the software community where it has shown its efficiency to deal with highly complex systems; however there is no equivalent in the embedded system domain where real time and power constraints have to be met. In order to fill the gap between UML specification of SR systems and embedded platform, new formalisms and associated tools have to be defined.
Many electronics applications are very compute-intensive (e.g., software-define radio, wireless communications, radar, and sonar). The challenge in developing these applications is to get the highest compute performance possible, while retaining tremendous flexibility to configure applications for specific functions. This increasing demand for compute capacity has challenged fixed instruction set processors. To overcome this, designers have begun trying to off-load portions of their algorithms onto hardware accelerators using FPGA or ASIC devices.
SDR-based radios rely on embedded software for code portability, reuse, and upgradeability. This paper explores a robust design process for SDR and embedded-code generation, for different a pplications and for diverse hardware and software platforms. The paper elaborates on the methodology that is based on the executable specification captured in mixed graphical/textual environment. This design flow supports: 1) System architecture exploration, 2) Communications performance evaluation, 3) Partitioning of a complex communication system into subsystems/components; 4) Automated portable embedded code generation suitable for integration with SCA components-based tools.
Increasing bandwidth demands and multi-platform com- munication standards require higher sample rates and call for highly parallel signal processing algorithms. This paper presents a proof-of-concept implementation of a 1.6 GHz channelizer implemented in a highly parallel processing platform. Although the implementation of signal processing algorithms was the design focus, dispelling common fears of handling digital I/O in the GHz range is an important contribution. Task specific devices designed for single standards (i.e. CDMA, GSM, OFDM) will not satisfy next generation system requirements. Versatility and reconfigurability to accommodate multi- ple standards will be a requirement to gain acceptance and future marketability. The need for software reconfigurability is particularly significant in the military communication arena. Recognizing that legacy and future modulation standards, bandwidths and carrier frequencies vary, this channelizer design provides the flexibility to meet requirements spanning a wide range of bandwidth and modulation formats. Higher sample rates increase system versatility at the expense of system complexity. Traditional DSP algorithms must be redesigned as parallel processes.
A Software Defined Radio for Ultra Wideband (UWB) communication systems places several stringent requirements on the Analog to Digital Converter (ADC). The ADC must have a sufficiently fast sampling frequency and SNR to accurately reconstruct the received UWB pulse. Such an ADC can be prohibitively expensive, as well as challenging to interface with a DSP or FPGA.
The ability to easily add or update application content is a distinguishing feature of Software Defined Radio (SDR). It is through this facility that a radio can approximate the capabilities of a general computing device. Installation of new applications or the ability to upgrade existing applications allows the radio to become a communications platform that can be enhanced to meet the changing needs of the users and the network service providers.
In wireless communications, accurate and tractable channel modeling is critical to evaluating the performance of the system. In this paper, we propose a new multiple-input multiple-output (MIMO) channel modeling technique for link level simulations. By utilizing wave superposition method, we propose a time varying MIMO channel in which the motion of antenna array can be characterized. With proposed channel model, we show that realistic propagation MIMO channel can be modeled and the spatial and temporal spread of MIMO channels are well modeled as well. Since the proposed model is applicable to any array geometry, the model can be applied to system simulations for MIMO as well as other adaptive antenna applications. For model verification, we present computer simulation result.
This paper describes a Tier 1 software-defined radio system that is space efficient and cost effective, integrating as many components as possible onto a single FPGA chip. We have implemented, demonstrated, and described a SDR based on straightforward concepts. This system is well suited for lecture discussions, demonstration of an AM digital radio, and practical laboratory implementation. We have targeted our design to be a real-world system design experience that allows students to put RF engineering, DSP, and communications theory into practice within the span of a single semester.
Southwest Research Institute ® (SwRI ® ) has developed algorithms and a demonstration system for digital predistortion and is marketing contract engineering services to add digital predistortion capability to radio transmitters for customers not only in cellular telephony, but also in mobile video and even space. Digital predistortion (DPD) is an important enabling technology for software defined radio because it improves spect rum control and efficiency and can support more flexible radio frequency (RF) hardware. This paper describes our research results, focused on the 3G cellular market.
To fully realize its promise of an all-encompassing communications device, special attention must now be given to the radio frequency (RF) front end of Software Defined Radio (SDR). While much work has been done to enable most air interfaces to be digitally implemented on signal processors, SDR's still use conventional RF designs for their front end, and thus can only operate over limited frequency ranges. The ideal SDR RF unit would be frequency-agile, tunable and could be incorporated directly into a radio to replace multiple banks of microwave sources, thus reducing the size, weight and (ideally) cost of the unit. This is a daunting task in the electrical domain and a paradigm shift may be in order.
Existing interconnects between RF and processing hardware have been tightly integrated at a system bus level or have incorporated proprietary network hardware, usually tied to the particular data being transported. This paper describes a system taking advantage of commodity Gigabit Ethernet to provide a flexible sample interconnect. Using off the shelf hardware provides flexibility at low cost allowing a choice of network topologies and equipment vendors. Our soft real time solution deals well with Ethernet jitter and unreliability, which has traditionally prevented its use in real time systems. The solution is general in nature, allowing for a variety of data content in many applications, including baseband interconnects, distributed antennas and signal processing clusters. We have implemented RF over Ethernet for the Vanu AnyWave™ GSM cellular basestation and report measurements of its performance.
Enabling technologies are reaching a pivotal point where efficient Software Defined Radios (SDR) may soon become a reality in many marketplaces. One of these technologies is the analog-to-digital converter (ADC) which is often the performance-limiting element in such systems. New converter architectures and processes are helping to improve critical performance; what was at one time not possible can now be achieved. New converters are also renewing interest in old receiver architectures to provide increased flexibility and simplicity. While IF sampling systems have gained popularity in recent years, focus is often towards direct conversion architectures for both transmit and receive paths. This paper examines where converters are and where they are headed in terms of enabling performance. In regard to performance, the types of receiver architectures that are enabled by this performance and how this can simplify the implementation of SDR technologies are examined along with the some of the many tradeoffs between the different topologies. While typical characteristics such as SNR and SFDR are examined to see how they affect system performance, other more subtle converter behavior characteristics that have always existed are examined closely to see how they may affect transceiver performance.
This paper illustrates the current vision on Flexible Spectrum Management (FSM), dimensions the technical mecha- nism involved in FSM from time, space, function, entity and ownership and in addition gives comprehensive comparisons with the state of the art in inter-operator spectrum resource management presented by the roaming technology. Comparisons show the attractive potentials given by FSM compared to the roaming technology and motivate the research activities towards a set a high efficient FSM solutions.
The issue of spectrum scarcity is both a pragmatic and perceptual problem. The real pr oblem is not so much a lack of spectrum but an apparent scarcity that comes from poor utilization caused by spectrum use policy that is fast becoming archaic due to the natural progress of technology and growth of societal use requirements. DARPA’s XG (NeXt Generation) program a sserts that spectrum capacity could conceivably be increased by an order of magnitude. This would be accomplished by “opportunistic spectrum access” via an iterative four-phase cycle of “sense, characterize, react, and adapt. ” While the latter two phases of react and adapt and the implicit policy definition and management have their own challenges, the really hard part technologically will be the initial two phases of sense and characterize, requiring sp ectrum ingest resources proportional to the demands of the application environment (commercial, military, etc.) and greater than may now be considered by many.
In this paper a distributed approach to mode identification and spectrum monitoring is studied. A Wireless Network composed by Cognitive Terminals is used to classify air interfaces present in the radio scene. The use of cooperative strategies and an advanced signal processing tool, Time Frequency analysis, allows to improve the radio awareness of device. Results in the terms of error probability, modeling the probability density function of considered features as Asymmetric Generalized and Generalized Gaussian functions, are compared to error rate showing good performance and coherence of theoretical model with experimental results.
Due to the natural limitation of the resource ’spectrum’ and an increasing need for wireless communications, it is indispensable to increase the efficiency of the spectrums utilization. One approach to achieve this goal is the concept of ’spectrum pooling’ [1] which allows the coexistence of two independent systems in the same frequency band, also called spectrum pool. The overlay system may only use the time-frequency gaps that are not used by the licensed system. Since the licensed systems allocation is time variant, situations can occur where there are not enough resources left for the overlay system to operate efficiently. In this paper we assume that there are several independent spectrum pools with different allocation characteristics. The overlay system now has to observe the spectrum pools and choose the most suitable pool for its transmission.
This paper presents a description, further enhancements to, and an analysis of a multi-user Orthogonal Frequency Division Multiplexing (OFDM)-based dynamic spectrum management technique called a Multiple User Data- Enhanced Radio Server (MUDERS). The term ‘fluid wireless’ is used to describe the discrete-time ‘water- flowing around obstacles’ interference-avoidance and intentional sub-band avoidance approach used to maximise channel capacity usage. The time-varying radio reconfiguration mechanisms required to implement this technique are also described including a means of indirect spectrum-monitoring Presented in this paper are results describing how this technique improves data-throughput and robustness of wireless communications links on a common frequency band. In addition, this paper describes how interference-free co-existence of primary and opportunistic secondary users of a wireless medium can be achieved.
Evolutionary technological developments have sought to improve spectral efficiency by increasing the number of users in each frequency band. Revolutionary technological advancements, however, have introduced cognitive radios, which promise more efficient spectrum utilization through environmental awareness. This technology builds on the accomplishments of Software Defined Radio, which replaces the classical heterodyne radio with a digital signal processor. By using advanced computing power to sense the existing radio frequency (RF) environment, cognitive radios become aware of and can respond to that environment. This intelligence allows communications devices to modify their behavior to optimize spectrum utilization in real time. However, RF devices must still operate within the boundaries set by rules and regulations. Cognitive radio may help improve spectrum management by moving it from the sclerotic framework of regulations to the flexible realm of networks and devices, thereby enabling dynamic spectrum sharing and improving spectrum utilization.
Ontology-Based Radio (OBR) is a mechanism for software defined communication nodes to understand and to modify the processing of communication packets. In this paper we describe the application of OBR at the data link layer. In particular, we describe how interoperability can be achieved at run time by using an ontology for data link protocols to deduce the protocol of a data link packet. The inference mechanism is based on the Web Ontology Language (OWL) and the Semantic Web Rule Language (SWRL). OBR presents a number of challenges not faced by other Semantic Web applications such as performance requirements and the highly dynamic nature of communication. We address these challenges by using a Prolog-based SWRL reasoner which provides very fast reasoning, and considerably smal ler memory requirements than other Semantic Web theorem provers.
The heterogeneity of the radio environment provides considerable obstacles when aiming for best possible usage of radio resources. The different mechanisms and radio resource management approaches of broadcast, cellular or even ad hoc networks have been optimized for their individual systems, but do not provide a sufficiently efficient performance when looking at the overall radio resource and spectrum usage. This paper describes the E2R projects approach towards a hybrid radio and spectrum resources management scheme capable to support the dynamic allocation of radio resources in a composite radio environment. The paper describes the individual approaches, matches them to their applicability-time-scale and introduces the overall hybrid scheme and its mechanisms.
This paper gives the definition of function re-allocation concept in a reconfiguration system. Due to the complexity of the function re-allocation concept which covers the radio subsystem and the O&M subsystem, we dimension the term for easy analysis.
Over-the-air (OTA) software download procedures can enable reduced communications system lifecycle costs, more easily updated features, and improved interoperability to markets such as public safety, the National Aeronautics and Space Administration (NASA), and commercial organizations by quickly and efficiently allowing update of the operating characteristics of software defined radios (SDR). Standardizing these procedures may provide further benefit in many markets.
Two muticarrier methods called filtered multitone (FMT) and cosine modulated multitone (CMT) are presented as physical layer protocols for cognitive radio networks. We compare FMT and CMT to orthogonal frequency division multiplexing (OFMD), and show that both FMT and CMT offer higher spectral efficiency. Furthermore, we show that the filter banks in the receiver front-end can also used for channel sounding according to a recently proposed channel sensing protocol. Since in cognitive radio networks, available unlicensed channel resources depend on the traffic of the licensed (primary) users, special requirements for data transmission among secondary users (SU) arise. We present simulation results for the two limiting cases of SU data transmission: optimal scheduling and multi- carrier ALOHA.
National Institute of Information and Communications Technology (NICT) has developed a software defined radio platform that consists of FPGA board, CPU board, and RF boards. On the platform, software packages for W-CDMA, I EEE802.11a/b, and digital terrestrial broadcasting have been developed. Each software package consists of physical layer, MAC/DLC layer, IP layer, and application layer part. In this paper the details of SDR platform and its software are introduced. Then, the volume of each software package for FPGAs and CPUs is shown and the minimum size of hardware that realizes communication and broadcasting systems with high-signal-processing-power is discussed. Finally, this paper shows the image and requirement of cognitive radio based on the research results.
The Public Safety community is responsible for a variety of community level police and fire functions to ensure the safety and well-being of citizens. Historically, voice communications have been the primary means of communication with units in the field.
A Software Communications Architecture (SCA) Waveform for space telemetry is being developed at the NASA Glenn Research Center. The space telemetry waveform is implemented in a laboratory testbed consisting of general purpose processors, FPGAs, ADCs, and DACs. The radio hardware is integrated with an SCA Core Framework and other software development tools. The waveform design is described from both the bottom-up signal processing and top-down software component perspectives. Simulations and model-based design techniques used for signal processing subsystems are presented. Testing with legacy hardware-based modems verifies proper design implementation and dynamic waveform operations.
The End-to-End Reconfigurability (E 2 R) project aims at realising the full benefits of the diversity within the radio eco-space, composed of wide range of systems such as cellular, fixed, wireless local area and broadcast. The key objective of the E 2 R project is to devise, develop, trial and showcase architectural design of reconfigurable devices and supporting system functions to offer an extensive set of operational choices to the users, application and service providers, operators, and regulators in the context of heterogeneous systems. Building on the successful developments of the first phase, E 2 R II will demonstrate and validate technologies that enable a true seamless experience based on reconfigurable heterogeneous systems. The project will pursue research into the most promising directions towards removing walls (current technical and regulatory limitations) and building bridges (technical) in order to facilitate the vision of true end-to-end connectivity. This paper presents the E 2 R II research project ambitions as well as each of the technical areas that will be tackled.
Software defined radios (SDR) introduce many new challenges, one of which is the proper development, maintenance, and distribution of the core software. As with any software venture, SDR requires industry, government, and the independent development community to work together to produce an environment that fosters software development and innovation. SDR differs from other areas of software development by the long history of radio regulatory requirements that must be satisfied. In this paper, we propose a methodology to bring to the SDR world the same level of development and innovation that has made other software ventures a success. The verification platform we propose allows software developments to guarantee regulatory compliance even when faced with the challenges of open source software and cognitive radio regulation.
SDR technology must comply with regulations to prev ent radio interference. These regulations, which can differ substantially across jurisdictions, have significant implications for device reconfigurability and mobility, which are often touted as SDR’s greatest potential benefits. For example, when the user of an SDR device travels from one regulatory jurisdiction to another, what may have been legal radio behavior in the first jurisdiction could be illegal in the second – even if both jurisdictions have regulatory structures that generally permit the use of SDR. This paper presents a regulatory framework th at would enable an SDR device to “learn” regulations relevant to its geographic location and restrict its behavior accordingly. The components of the framework include a public key infrastructure (PKI) managed by an international regulatory body such as the International Telecommunications Union (ITU), a meta-language for describing regulatory policy, and a standardized run-time software interface for controlling radio parameters such as frequency, power, and modulation.
As the popularity of wireless networks increases, so does the need to protect them. In recent years, many researchers have studied the limitations of the security mechanisms that protect Wireless networks. There has also been much research in the power consumption introduced by the network card. Technologies such as CPU and memory are increasing and so is their need for power, but battery technology is increasing at a much slower rate, forming a ”battery gap” Because of this, battery capacity plays a major role in the usability of the devices. Although the effect of the network communication on a mobile device’s battery has been widely researched, th ere has been less research on the effect of the security prof ile on energy usage. In this manuscript, we examine a method for analyzing trade-offs between energy and security. This work extends previous work on the relationship between energy and the security of wireless communications in battery-constrained devices.
Services and applications provided over wireless systems are increasing every year. However, because the quality of service (QoS) differs from service to service, it is difficult to provide all services and applications using one wireless system alone. To solve this problem, we propose an adaptive service function assignment that efficiently uses wireless systems. We evaluated its performance in computer simulations and show the efficiency of the proposed scheme based on the simulation results. We also considered the network architecture of composite wireless systems that use the adaptive service function assignment method.
NAVSYS has developed a Software Defined Radio (SDR) test-bed with the capability of navigating inside of buildings. This test-bed combines Global Positioning System (GPS), wireless communications, and Time-of- Arrival (TOA) “Pseudolite” technology to provide location indoors for applications such as first responders, warfighters, and location-based services.
This paper assumes an environment where IEEE802.11a and UWB wireless communicati on systems coexist, and proposes a method to avoid interference from UWB systems to IEEE802.11a. Since both UWB systems and IEEE802.11a utilize a common frequency spectrum, the UWB signal power affects the carrier-sensing of IEEE802.11a. As a result, the throughput of the latter degrades. In this paper, the transmission power of UWB is controlled to avoid interference to IEEE802.11a. By using cognitive radio technique implemented at the base station of IEEE802.11a and monitoring throughput of IEEE802.11a, the transmission power is controlled accordingly. Additionally, the value of each transmission power is optimized in order to maximize total throughput of both IEEE802.11a and UWB, and each throughput and carrier-sense error rate are calculated and compared.
The platform development is important to realize a low-cost and high flexible software defined radio (SDR) equipment. In this paper, we propose a SDR platform and describe the prototype development of the SDR platform. The SDR platform consists of three components. The first is software library, that can be commonly used for signal processings of various radio communication systems, by having the distributed control function. The second is analog front-end that supports different radio parameters for various radio systems. The other is a versatile and scalable digital signal processing hardware. By developing a prototype of the SDR platform and the softwares that support to IEEE 802.11b and advanced PHS, it is confirmed that the SDR platform can adapt to various radio communication systems, and improve the efficiency of the SDR equipment development.
Multiple communication channel support in RF transmission, such as that in a Software Defined Radio (SDR) warrants the use of channelizers to extract required channels from the received RF frequency band and to perform follow-on baseband processing. This paper describes the process of channelization as it applies to low-power and high-efficiency applications in wireless and Satellite Communications (SATCOM) domains. Smaller bandwidths and changing requirements of bandwidth calls for a programmable channel selection mechanism whereby channels and the resulting bandwidth can be selected based on target application, which is the primary principle in the Software Defined Radio based systems. Evolving wireless standards, advances in FPGA technologies available at a much lower Non-Recurring Engineering (NRE) costs than those for a comparable custom designed ASIC make programmable channelizer a viable solution. Radiation hardness is an essential requirement for parts used in space systems. This paper addresses the importance of methods to meet radiation requirements: selection of robust technologies and hardening by design.
The use of non-CORBA enabled devices is required in SDR (SW Defined Radio) platforms to support modern waveform with hard real time constraints. That has been causing more and more attention towards SCA framework extension to include specialized hardware[1 ]. While previous V2.2.1 SCA (Software Communication Architecture) Specification [2] achieved waveform portability, one of them in SCA purposes, for GPP (General Purpose Processors), it is recognized that current SCA V3.0 , specifically with its SHS (Specialized Hardware Supplement ) [3] , does not fully achieve the same result for non-CORBA enabled devices. Fig. 1 HAL-C Model In this paper are described some experimental activities that Selex Comms, waiting for clarifications in the new SCA release, has been carrying out. The main discussed topics are SCA components distributed on non-CORBA enable devices, FPGA in particular, and the test and usage of high speed serial I/ O clock data recovery GigaBit lines to connect different boards in a SCA compliant system.
General Dynamics C4 Systems extends the Digital Modular Radio (DMR) system to the High Frequency (HF) domain. Base-band serial and parallel tone modem functionality is integrated with embedded, AIM-based KY-99A, KWR-46, and KG-84C cryptographic algorithms plus single-sideband (SSB) radio frequency (RF) modulation to provide four channels of HF plain text (PT) and cipher text (CT) communication. An Automatic Link Establishment (ALE) controller is added, to provide call management and link quality monitoring capabilities for both HF line-of-sight (LOS) and sky wave channels, in the first software defined radio (SDR) system funded by the United States Navy.
While Moore’s Law has been predictive of continuous gains in digital circuit scaling, the relative performance of analog circuits has not scaled along with digital. Due to characteristics of analog circuitry, noise and distortion performance do not benefit from scaling, and some inherent challenges intensify with reduced supply voltage. Analog functions are often system roadblocks, resulting in constrained performance, especially in high-performance signal processing applications. However, as digital circuitry has scaled down, it has become practical to use digital processing in conjunction with analog functions to offload some of the bottlenecks, and the digitally assisted analog trend is well identified. This paper presents an example of the high leverage of this approach in overcoming a previously unsolvable problem: eliminating nonlinear distortion in a high-speed analog signal path using digital post-processing techniques. Through digital processing using advanced nonlinear signal processing algorithms, the ADC output signal is used as the input to a digitally replicated nonlinear transfer function. The output of this function is then subtracted from the ADC output in order to generate a highly linearized version of the ADC output and restore signal fidelity. The digital circuitry overhead is small for the implementation of the linearizer algorithms. In addition, the digitally assisted approach gives designers not only a much-valued linearity improvement, but also a greater command of the system design tradeoffs between speed, performance, power dissipation and cost. The ability to digitally correct for analog impairments in a high-speed analog-to-digital converter front end is a highly desirable feature in a Software Defined Radio application because it allows for higher input signal frequencies to be subsampled with low noise and high linearity.
Broadband, multi-carrier, software-defined radio (SDR) mobile wireless network infrastructure is an excellent plat - form onto which Adaptive Array software can be efficiently applied. The first commercial SDR cellular base station was deployed in 1997 and the first fully adaptive, smart antenna GSM base station was deployed in early 2004. The Broadband, Software-Defined Base Station has provided the foundation for the software-centric realization of this adaptive array antenna system, enabling unprecedented spectral efficiency for network operators.
This paper discusses the design considerations of a unique antenna array distribution used for developing narrow beam antenna patterns with low sidelobes and high aperature efficiency. The distribution is referred to as the Constrained Least Squares (CLS) distribution function. In the CLS distribution, most of the radiating elements near the array center are set to their maximum value while only a few of the outer elements are tapered. Several methods for generating CLS distributions given constraints on both the peak element amplitude and the total effective radiated voltage (ERV) will be discussed. The design involves specifying the desired ERV and a weighting function that allows selectively suppressing sidelobes in specified regions. The effects of these design parameters on the far field patterns are explored.
This paper discusses the approach and benefits of implementing an automatically tuning antenna for the further development of software defined radio (SDR). Electrically small antennas (ESAs) are utilized as tunable filters as well as radiating elements to simplify the RF front- end design, which has the potential to lower the cost of next generation commercial and military radios while simultaneously enhancing performance. The automatic tunability of the frequency selective antenna is achieved by a closed-loop automatic antenna tuning unit (ATU). In implementing the ATU, two different types of tunable matching networks are developed to match a more or less arbitrary load to a convenient impedance value, usually 50 Ω s. To generate feedback data that can be used to optimize the impedance synthesizer, the incident and reflected powers at the input to the impedance synthesizer are measured using a power detector comprising directional couplers, power detector diodes, and ADCs. In order to validate the design of the ATU, a hardware implementation of the ATU prototype has been demonstrated successfully.
A small wideband microstrip-fed monopole antenna for mobile communication system is designed. The antenna has a wide bandwidth ranging from 1.65 GHz to 10.6 GHz for S 11 < -10 dB. Various mobile communication services such as DCS, IMT-2000, UMTS, WiBro, WLAN, DMB, and UWB can be easily covered by the proposed antenna simultaneously. In this paper, details of the proposed antenna design approach and measured results are presented and discussed.
This paper proposes a dual band antenna of chip type that can be applied to actual portable phones. This antenna configuration has tuning capability when it is applied to practical phones. The minimization of the antenna was realized by using a helical and meander structure that has a loop antenna composed of vias and lines on FR-4 PCB of. The antenna characteristic was analyzed depending on tuning components, the size of supporting dielectric portion and its permittivity by using the commercial software HFSS 3-D EM simulator.
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